MPC8572ECVTATLD datasheet(95/140 Pages) FREESCALE

95 / 140 page

MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4

Freescale Semiconductor

Serial RapidIO

Figure 58. Transmitter Output Compliance Mask

17.6

Receiver Specifications

LP-Serial receiver electrical and timing specifications are stated in the text and tables of this section.

Receiver input impedance shall result in a differential return loss better that 10 dB and a common mode

return loss better than 6 dB from 100 MHz to (0.8)

× (Baud Frequency). This includes contributions from

on-chip circuitry, the chip package and any off-chip components related to the receiver. AC coupling

components are included in this requirement. The reference impedance for return loss measurements is

100 Ohm resistive for differential return loss and 25-

Ω resistive for common mode.

Table 70. Transmitter Differential Output Eye Diagram Parameters

Transmitter Type

VDIFFmin (mV) VDIFFmax (mV)

A (UI)

B (UI)

1.25 GBaud short range

250

500

0.175

0.39

1.25 GBaud long range

400

800

0.175

0.39

2.5 GBaud short range

250

500

0.175

0.39

2.5 GBaud long range

400

800

0.175

0.39

3.125 GBaud short range

250

500

0.175

0.39

3.125 GBaud long range

400

800

0.175

0.39

VDIFF min

VDIFF max

-VDIFF min

-VDIFF max

1-B

Time in UI

A1-A

MPC8572ECVTATLD 数据表(PDF) 95 Page - Freescale Semiconductor, Inc

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