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MPC8572ECVTATLD 数据表(PDF) 76 Page - Freescale Semiconductor, Inc

部件名 MPC8572ECVTATLD
功能描述  MPC8572E PowerQUICC III Integrated Processor Hardware Specifications
PDF  140 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

MPC8572ECVTATLD 数据表(HTML) 76 Page - Freescale Semiconductor, Inc

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MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
76
Freescale Semiconductor
High-Speed Serial Interfaces (HSSI)
Figure 46. Differential Reference Clock Input DC Requirements (External AC-Coupled)
Figure 47. Single-Ended Reference Clock Input DC Requirements
15.2.3
Interfacing With Other Differential Signaling Levels
•
With on-chip termination to SGND_SRDSn (xcorevss), the differential reference clocks inputs are
HCSL (High-Speed Current Steering Logic) compatible DC-coupled.
•
Many other low voltage differential type outputs like LVDS (Low Voltage Differential Signaling)
can be used but may need to be AC-coupled due to the limited common mode input range allowed
(100 to 400 mV) for DC-coupled connection.
•
LVPECL outputs can produce signal with too large amplitude and may need to be DC-biased at
clock driver output first, then followed with series attenuation resistor to reduce the amplitude,
additionally to AC-coupling.
SD
n_REF_CLK
SD
n_REF_CLK
Vcm
200 mV < Input Amplitude or Differential Peak < 800 mV
Vmax
< Vcm + 400 mV
Vmin
> Vcm – 400 mV
SD
n_REF_CLK
SD
n_REF_CLK
400 mV
< SDn_REF_CLK Input Amplitude < 800 mV
0V



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