Sensors

Freescale Semiconductor

29

MMA690xQ

5.4

CONTROL TIMING

Figure 5-1 Power-Up Timing

Figure 5-2 CS Reset Timing

Characteristic

Symbol

Min

Typ

Max

Units

DSP Low-Pass Filter Cut-Off Frequency

Filter Order

47.5

50.0

2

52.5

Hz

1

(1)

(1)

1.Functionality verified 100% via scan. timing characteristic is directly determined by internal oscillator frequency.

Power-On Recovery Time

POR negated to CS low

⎯

⎯

⎯

⎯

840

15

μs

ms

(1)

(2)

2.Parameters tested 100% at final test.

Internal Oscillator Frequency

3.8

4.0

4.2

MHz

(2)

Clock Monitor Threshold

3.6

⎯

4.4

MHz

(1)

Chip Select to Internal Reset (See Figure 5-2)

486

512

538

μs

(1)

Serial Interface Timing (See Figure 5-3)

Clock period

CS asserted to SCLK high

Data setup time

Data hold time

SCLK high to data out

SCLK high to CS negated

CS negated to CS asserted

120

60

20

10

—

60

600

⎯

⎯

⎯

⎯

⎯

⎯

⎯

⎯

⎯

⎯

⎯

50

—

—

ns

ns

ns

ns

ns

ns

ns

(3)

(3)

(3)

(3)

(3)

(3)

(3)

3.Verified by characterization, not tested in production.

Sensing Element Natural Frequency

Sense Element Bandwidth (-3.0 dB)

⎯

⎯

3

1.2

⎯

⎯

kHz

kHz

(3)

(3)

5.5V

POR

INTERNAL RESET

CS

SCLK