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HT68FU50 数据表(PDF) 81 Page - Holtek Semiconductor Inc |
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HT68FU50 数据表(HTML) 81 Page - Holtek Semiconductor Inc |
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81 / 244 page  HT68F20/HT68F30/HT68F40/HT68F50/HT68F60 HT68FU30/HT68FU40/HT68FU50/HT68FU60 Rev. 1.50 81 March 15, 2011 TM Input/Output Pin Control Registers Selecting to have a TM input/output or whether to retain its other shared function, is implemented using one or two reg- isters, with a single bit in each register corresponding to a TM input/output pin. Setting the bit high will setup the corre- sponding pin as a TM input/output, if reset to zero the pin will retain its original other function. Registers Device Bit 7654 3 2 1 0 TMPC0 HT68F20 ¾¾ T1CP1 T1CP0 ¾¾ ¾ T0CP0 TMPC0 HT68F30 T1ACP0 ¾ T1BCP1 T1BCP0 ¾¾ T0CP1 T0CP0 TMPC0 HT68F40 HT68F50 HT68F60 T1ACP0 T1BCP2 T1BCP1 T1BCP0 ¾¾ T0CP1 T0CP0 TMPC1 HT68F40 ¾¾¾¾ ¾ ¾ T2CP1 T2CP0 TMPC1 HT68F50 HT68F60 ¾¾ T3CP1 T3CP0 ¾¾ T2CP1 T2CP0 TM Input/Output Pin Control Registers List P A 0 / T P 0 _ 0 P A 0 O u t p u t F u n c t i o n T 0 C P 0 0 1 P A 2 / T C K 0 O u t p u t T C K I n p u t T M 0 ( C T M ) P C 0 O u t p u t F u n c t i o n 0 1 P C 0 1 0 O u t p u t C a p t u r e I n p u t P A 4 / T C K 1 T C K I n p u t 1 0 T M 1 ( S T M ) P C 0 / T P 1 _ 1 T 1 C P 1 T 1 C P 1 P A 1 O u t p u t F u n c t i o n 0 1 P A 1 1 0 1 0 P A 1 / T P 1 _ 0 T 1 C P 0 T 1 C P 0 HT68F20 TM Function Pin Control Block Diagram Note: The I/O register data bits shown are used for TM output inversion control. In the Capture Input Mode, the TM pin control register must never enable more than one TM input. |
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