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ADAU1373BCBZ-R7 数据表(PDF) 248 Page - Analog Devices |
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ADAU1373BCBZ-R7 数据表(HTML) 248 Page - Analog Devices |
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248 / 296 page ![]() ADAU1373 Rev. 0 | Page 248 of 296 Table 221. Bit Descriptions for ALC_CTRL4 Bits Bit Name Settings Description Reset Access [7:4] ALCNGTH ALC Noise Gate Threshold. ALC noise gate threshold level setting. 0x0 RW 0000 −81 dBFS 0001 −78 dBFS 0010 −75 dBFS 0011 −72 dBFS 0100 −69 dBFS 0101 −66 dBFS 0110 −63 dBFS 0111 −60 dBFS 1000 −57 dBFS 1001 −54 dBFS 1010 −51 dBFS 1011 −48 dBFS 1100 −45 dBFS 1101 −42 dBFS 1110 −39 dBFS 1111 −36 dBFS [3:0] ALCNGHLD ALC Noise Gate Hold Time. The ALC holds the gain for the set time when input level is below noise gate threshold. 0x0 RW 0000 0 ms 0001 2.67 ms 0010 5.33 ms 0011 10.67 ms 0100 21.33 ms 0101 42.67 ms 0110 85.33 ms 0111 170.67 ms 1000 341.33 ms 1001 682.67 ms 1010 1.365 sec 1011 2.730 sec 1100 5.460 sec |
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