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ADAU1373BCBZ-R7 数据表(PDF) 249 Page - Analog Devices |
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ADAU1373BCBZ-R7 数据表(HTML) 249 Page - Analog Devices |
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249 / 296 page  ADAU1373 Rev. 0 | Page 249 of 296 ALC_CTRL5 REGISTER Address: 0xC7, Reset: 0x00, Name: ALC_CTRL5 ALC Control Register Table 222. Bit Descriptions for ALC_CTRL5 Bits Bit Name Settings Description Reset Access [7:4] ALCNGATT ALC Noise Gate Attack Time. Valid only when NGMODE set to 10 or 11. ALC noise gate attack time setting. This setting is valid only in Noise Gate Mode 2 and Noise Gate Mode 3. 0x0 RW 0000 6 ms 0001 12 ms 0010 24 ms 0011 48 ms 0100 96 ms 0101 192 ms 0110 384 ms 0111 768 ms 1000 1.536 sec 1001 3.072 sec 1010 6.144 sec 1011 12.288 sec 1100 24.576 sec 1101 24.576 sec 1110 24.576 sec 1111 24.576 sec [3:0] ALCNGREC ALC Noise Gate Recovery Time. Valid only when NGMODE set to 11. ALC noise gate recovery time setting. This setting is valid only in Noise Gate Mode 3. 0x0 RW 0000 1.5 ms 0001 3 ms 0010 6 ms 0011 12 ms 0100 24 ms 0101 48 ms 0110 96 ms |
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