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ADAU1373BCBZ-R7 数据表(PDF) 262 Page - Analog Devices |
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ADAU1373BCBZ-R7 数据表(HTML) 262 Page - Analog Devices |
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262 / 296 page ![]() ADAU1373 Rev. 0 | Page 262 of 296 IRQ_MASK REGISTER Address: 0xE5, Reset: 0x00, Name: IRQ_MASK Interrupt Mask Control Register Table 233. Bit Descriptions for IRQ_MASK Bits Bit Name Settings Description Reset Access 7 ASRCC_IRQ_MASK Mask the IRQ of ASRCC. Interrupt mask setting for ASRCC. 0x0 RW 0 Mask (default) 1 No mask 6 ASRCB_IRQ_MASK Mask the IRQ of ASRCB. Interrupt mask setting for ASRCB. 0x0 RW 0 Mask (default) 1 No mask 5 ASRCA_IRQ_MASK Mask the IRQ of ASRCA. Interrupt mask setting for ASRCA. 0x0 RW 0 Mask (default) 1 No mask 4 DRC_IRQ_MASK Mask the IRQ of DRC IRQ. Interrupt mask setting for DRC IRQ. 0x0 RW 0 Mask (default) 1 No mask 3 PLL_UNLOCK_MASK Mask the IRQ of PLL_UNLOCK. Interrupt mask setting for PLL unlock. 0x0 RW 0 Mask (default) 1 No mask 2 HP_CFG_MASK Mask the IRQ of Headphone Setting Change. Interrupt mask setting for headphone setting change. 0x0 RW 0 Mask (default) 1 No mask 1 HP_DECT_MASK Mask the IRQ of Headphone Detect. Interrupt mask setting for headphone fault. 0x0 RW 0 Mask (default) 1 No mask 0 AFAULT_MASK Mask the IRQ of Analog Fault. Interrupt mask setting for analog fault. 0x0 RW 0 Mask (default) 1 No mask |
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