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WM72016 数据表(PDF) 11 Page - Ramtron International Corporation |
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WM72016 数据表(HTML) 11 Page - Ramtron International Corporation |
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11 / 32 page ![]() WM72016 – Secure F-RAM with Gen-2 RFID and Serial Port Rev. 1.4 May 2011 Page 11 of 32 Upon power up, WM72016‟s control logic reads the control word out of memory and configures itself accordingly. User applications may change the control word as needed providing the register has not been permanently locked. The Control/Status word may be read by the application at any time. Register Locking: The LOCK and PERMALOCK control bits are implemented in a similar manner as locking bits used for Gen2 memory bank locking with the exception that the lock control bits are incorporated into the register they are locking. As such, attention needs to be placed on how the contents of the Control/Status word are written when the register is not completely unlocked. Table 4: Control/Status Word Locking LOCK PERMA- LOCK Description 0 0 Register unlocked. All control bits, including the LOCK and PERMALOCK bits can be written to from the OPEN or SECURED states. 0 1 Register permanently unlocked. All control bits can be written from the OPEN or SECURED states. The LOCK and PERMALOCK bits must be set to logic values 0 and 1 respectively when writing the Control/Status word. 1 0 Register locked. All control bits can be written to only from the SECURED state. The register cannot be written to in the OPEN state. The LOCK and PERMALOCK bits must be set to logic values 1 and 0 respectively when writing the Control/Status word. 1 1 Register permanently locked. The register cannot be written in any circumstance. Block Write Enable: The BLKWREN control bit enables usage of the WM72016 custom command BLOCKWRITE. The BLKWREN parameter is internally updated during power-on WM72016 initialization. In the event the host application toggles the state of BLKWREN either through the Gen2 or serial interfaces, a WM72016 power cycle is required to reflect the change. Block Size: The 3 BLKSIZ[2:0] control bits adjust the USER memory block sizes as shown in Table 5. This provides a host application the ultimate flexibility in determining a balance between the USER memory requirements and the granularity of the number of USER memory words per block. The larger the granularity of the block size, the greater amount of available USER memory. The effect of the block size on available USER memory is shown in Table 1. The total number of USER memory words available as a function of the block size is shown in Table 5 below. It is of utmost importance that the 3-bit block size is not modified once set, which would otherwise result in corruption of block permalock status bits. Table 5: Available USER Memory Memory BLKSIZ Words/Block Free USER Memory (words) 16k 000 1 931 16k 001 2 963 16k 010 4 979 16k 011 8 987 16k 100 16 991 16k 101 32 993 16k 110 64 993 16k 111 128 993 Wrap Status: The WRPSTAT status bit is asserted to a logic one when the following conditions are true: (a) WRPEN=1, AUTOINCR=1 and AUTOLOCK=0, (b) The contents of the Working Stored Address register address the last USER memory location, and (c) An unaddressed WRITE command is received. The WRPSTAT can be cleared by the RFID interrogator by writing a logic zero to the WRPSTAT bit. |
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