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ADP1853ACPZ-R7 数据表(PDF) 16 Page - Analog Devices |
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ADP1853ACPZ-R7 数据表(HTML) 16 Page - Analog Devices |
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16 / 28 page  ADP1853 Data Sheet Rev. 0 | Page 16 of 28 THERMAL OVERLOAD PROTECTION The ADP1853 has an internal temperature sensor that senses the junction temperature of the chip. When the junction temperature of the ADP1853 reaches approximately 155°C, the ADP1853 goes into thermal shutdown, the converter is turned off, and SS discharges toward zero through an internal 3 kΩ resistor. At the same time, VCCO discharges to zero. When the junction temperature drops below 135°C, the ADP1853 resumes normal operation after the soft start sequence. INTERLEAVED DUAL-PHASE OPERATION Two ADP1853 controllers can be configured to design a dual-phase, interleaved, step-down, switching dc-to-dc regulators. In dual-phase operation, the two outputs of the switching regulators are tied together and can source more than 50 A of output current depending on the selection of the power components. See Figure 24 for a configuration of a typical dual-phase application circuit. Note that only one error amplifier, in the master ADP1853, works; the error amplifier in the slave ADP1853 output is turned to tristate by tying FB to VCCO. The CLKOUT signal from the master is connected to the SYNC input of the slave controller; the SS signals of the master and slave are tied together; COMP of the slave must be tied to COMP of the master; and PGOOD of the slave must be tied to PGOOD of the master. Figure 24. Dual-Phase Application VIN M2 M1 FB SW PGND VIN L1 DH BST DL RCSG RRAMP RAMP PGOOD SYNC TRK SS ILIM EN COMP CLKOUT FREQ VCCO VOUT ADP1853 CS AGND MASTER VIN M4 M3 FB SW PGND VIN L2 DH BST DL RCSG RRAMP RAMP PGOOD SYNC TRK SS ILIM EN COMP CLKOUT FREQ VCCO ADP1853 CS AGND SLAVE |
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