ADP1853ACPZ-R7 datasheet(23/28 Pages) AD

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Data Sheet

ADP1853

Rev. 0 | Page 23 of 28

Use the larger value of CIfrom Equation 14 or Equation 15.

Because of the finite output current drive of the error amplifier,

CI needs to be less than 10 nF. If it is larger than 10 nF, choose a

larger RTOP and recalculate RZ and CI until CI is less than 10 nF.

Next, choose the high frequency pole, fP1, to be ½ of fSW.

(16)

Because CHF << CI,

(17)

Combine Equation 16 and Equation 17, and solve for CHF,

(18)

For maximally precise compensation solutions, use the

ADIsimPower design tool.

SWITCHING NOISE AND OVERSHOOT REDUCTION

To reduce voltage ringing and noise, it is recommended to add

an RC snubber between SW and PGND for high current

applications, as illustrated in Figure 30.

In most applications, RSNUB is typically 2 Ω to 4 Ω, and CSNUB is

typically 1.2 nF to 3 nF.

The size of the RC snubber components must be chosen

correctly to handle the power dissipation. The power dissipated

in RSNUB is

SNUB

In most applications, a component size of 0805 for RSNUB is

sufficient. The RC snubber does not reduce the voltage over-

shoot. A resistor, shown as RRISE in Figure 30, at the BST pin

helps to reduce overshoot and is generally between 2 Ω and

4 Ω. Adding a resistor in series, typically between 2 Ω and

4 Ω, with the gate driver also helps to reduce overshoot. If a

gate resistor is added, then RRISE is not needed.

Figure 30. Application Circuit with a Snubber

VOLTAGE TRACKING

The ADP1853 includes a tracking feature that tracks a master

voltage. In all tracking configurations, the output can be set as

low as 0.6 V for a given operating condition. The soft start time

setting of the master voltage should be longer than the soft start

of the slave voltage. This forces the rise time of the master

voltage to be imposed on the slave voltage. If the soft start

setting of the slave voltage is longer, the slave comes up more

slowly, and the tracking relationship is not seen at the output.

Two tracking configurations are possible with the ADP1853:

coincident and ratiometric tracking.

Coincident Tracking

The most common application is coincident tracking, used

in core vs. I/O voltage sequencing and similar applications.

Coincident tracking forces the ramp rate of the output voltage

to be the same for the master and slave until the slave output

reaches its regulation. Connect the slave TRK input to a resistor

divider from the master voltage that is the same as the divider

used on the slave FB pin. This forces the slave voltage to be the

same as the master voltage. For coincident tracking, use RTRKT =

RTOP and RTRKB = RBOT, as shown in Figure 32.

Figure 31. Coincident Tracking

Figure 32. Example of a Coincident Tracking Circuit

The ratio of the slave output voltage to the master voltage is a

function of the two dividers.

























TRKB

TRKT

BOT

TOP

MASTER

OUT

SLAVE

OUT

VIN

ADP1853

BST

PGND

RRISE

VOUT

CSNUB

COUT

RSNUB

MASTER VOLTAGE

SLAVE VOLTAGE

TIME

ADP1853

TRK

RBOT

10kΩ

RTOP

20k

Ω

1.1V

3.3V

VOUT_MASTER

1.8V

VOUT_SLAVE

RTRKB

10kΩ

RTRKT

20kΩ

CSS

20nF

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