ADP5040ACPZ-1-R7 datasheet(31/40 Pages) AD

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Data Sheet

ADP5040

Rev. 0 | Page 31 of 40

Table 12. Suggested 1.0 μF Capacitors

Vendor

Type

Model

Case

Size

Voltage

Rating

(V)

Murata

X5R

GRM155R61A105ME15

0402

10.0

TDK

X5R

C1005JB0J105KT

0402

6.3

Panasonic

X5R

ECJ0EB0J105K

0402

6.3

Taiyo Yuden

X5R

LMK105BJ105MV-F

0402

10.0

Input and Output Capacitor Properties

Use any good quality ceramic capacitor with the ADP5040 as

long as it meets the minimum capacitance and maximum ESR

requirements. Ceramic capacitors are manufactured with a variety

of dielectrics, each with a different behavior over temperature

and applied voltage. Capacitors must have a dielectric adequate

to ensure the minimum capacitance over the necessary tempe-

rature range and dc bias conditions. X5R or X7R dielectrics

with a voltage rating of 6.3 V or 10 V are recommended for best

performance. Y5V and Z5U dielectrics are not recommended

for use with any LDO because of their poor temperature and dc

bias characteristics.

Figure 107 depicts the capacitance vs. voltage bias characteristic

of a 0402 1 µF, 10 V, X5R capacitor. The voltage stability of a

capacitor is strongly influenced by the capacitor size and voltage

rating. In general, a capacitor in a larger package or higher voltage

rating exhibits better stability. The temperature variation of the

X5R dielectric is about ±15% over the −40°C to +85°C tempera-

ture range and is not a function of package or voltage rating.

1.2

1.0

0.8

0.6

0.4

0.2

DC BIAS VOLTAGE (V)

Figure 107. Capacitance vs. Voltage Characteristic

Use the following equation to determine the worst-case capa-

citance accounting for capacitor variation over temperature,

component tolerance, and voltage.

CEFF = CBIAS × (1 − TEMPCO) × (1 − TOL)

where:

CBIAS is the effective capacitance at the operating voltage.

TEMPCO is the worst-case capacitor temperature coefficient.

TOL is the worst-case component tolerance.

In this example, the worst-case temperature coefficient

(TEMPCO) over −40°C to +85°C is assumed to be 15% for an

X5R dielectric. The tolerance of the capacitor (TOL) is assumed

to be 10%, and CBIAS is 0.94 μF at 1.8 V as shown in Figure 107.

Substituting these values into the following equation yields:

CEFF = 0.94 μF × (1 – 0.15) × (1 – 0.1) = 0.72 μF

Therefore, the capacitor chosen in this example meets the

minimum capacitance requirement of the LDO over

temperature and tolerance at the chosen output voltage.

To guarantee the performance of the ADP5040, it is imperative

that the effects of dc bias, temperature, and tolerances on the

behavior of the capacitors be evaluated for each application.

POWER DISSIPATION/THERMAL CONSIDERATIONS

The ADP5040 is a highly efficient micropower management

unit (micro PMU), and in most cases the power dissipated in

the device is not a concern. However, if the device operates at

high ambient temperatures and with maximum loading

conditions, the junction temperature can reach the maximum

allowable operating limit (125°C).

When the junction temperature exceeds 150°C, the ADP5040

turns off all the regulators, allowing the device to cool down.

Once the die temperature falls below 135°C, the ADP5040

resumes normal operation.

This section provides guidelines to calculate the power dissi-

pated in the device and to make sure the ADP5040 operates

below the maximum allowable junction temperature.

The efficiency for each regulator on the ADP5040 is given by

100%

OUT

(1)

where:

η is efficiency.

PIN is the input power.

POUT is the output power.

Power loss is given by

PLOSS = PIN − POUT

(2a)

PLOSS = POUT × (1 − η)/η

(2b)

Power dissipation can be calculated in several ways. The most

intuitive and practical way is to measure the power dissipated at

the input and all the outputs. The measurements should be

performed at the worst-case conditions (voltages, currents,

and temperature). The difference between input and output

power is dissipated in the device and the inductor. Use

Equation 4 to derive the power lost in the inductor, and from

this use Equation 3 to calculate the power dissipation in the

ADP5040 buck regulator.

A second method to estimate the power dissipation uses the

efficiency curves provided for the buck regulator, whereas the

power lost on a LDO is calculated using Equation 12. When the

buck efficiency is known, use Equation 2b to derive the total

power lost in the buck regulator and inductor. Use Equation 4

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