ADP5040ACPZ-1-R7 datasheet(25/40 Pages) AD

25 / 40 page

Data Sheet

ADP5040

Rev. 0 | Page 25 of 40

THEORY OF OPERATION

PWM/

PSM

CONTROL

BUCK1

DRIVER

AND

ANTISHOOT

THROUGH

PSM

COMP

ADP5040

VOUT1

FB1

VIN1

AVIN

PGND

AGND

VIN2

FB2

VOUT2

VIN3

ENLDO1

600

Ω

ENBK

ENLDO2

600

Ω

VOUT3

FB3

OSCILLATOR

THERMAL

SHUTDOWN

VDDA

PWM

COMP

GM ERROR

AMP

85Ω

SOFT START

SYSTEM

UNDERVOLTAGE

LOCK OUT

LDO1

CONTROL

LDO2

CONTROL

VDDA

ENABLE

& MODE

CONTROL

ENLDO1

ENBK

ENLDO2

MODE

SEL

MODE

EN1

EN2

EN3

OPMODE_FUSES

VDDA

ILIMIT

LOW

CURRENT

Figure 101. Functional Block Diagram

POWER MANAGEMENT UNIT

The ADP5040 is a micro power management unit (micro PMU)

combing one step-down (buck) dc-to-dc regulator and two low

dropout linear regulators (LDOs). The high switching frequency

and tiny 20-pin LFCSP package allow for a small power

management solution.

The regulators are activated by a logic level high applied to the

respective EN pin. The EN1 pin controls the buck regulator, the

EN2 pin controls LDO1, and the EN3 pin controls LDO2. The

MODE pin controls the buck switching operation.

The regulator output voltages are set through external resistor

dividers.

When a regulator is turned on, the output voltage ramp is

controlled through a soft start circuit to avoid a large inrush

current due to the discharged output capacitors.

The buck regulator can operate in forced PWM mode if the

MODE pin is at a logic high level. In forced PWM mode, the

switching frequency of the buck is always constant and does not

change with the load current. If the MODE pin is at a logic low

level, the switching regulator operates in auto PWM/PSM mode.

In this mode, the regulator operates at fixed PWM frequency

when the load current is above the power saving current threshold.

When the load current falls below the power save current

threshold, the regulator enters power saving mode, where the

switching occurs in bursts. The burst repetition rate is a

function of the current load and the output capacitor value.

This operating mode reduces the switching and quiescent

current losses.

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