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ADP5040ACPZ-1-R7 数据表(PDF) 32 Page - Analog Devices

部件名 ADP5040ACPZ-1-R7
功能描述  Micro PMU with 1.2 A Buck Regulator
PDF  40 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP5040ACPZ-1-R7 数据表(HTML) 32 Page - Analog Devices

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ADP5040
Data Sheet
Rev. 0 | Page 32 of 40
to derive the power lost in the inductor, and then calculate the
power dissipation in the buck converter using Equation 3. Add
the power dissipated in the buck and in the LDOs to find the
total dissipated power.
Note that the buck efficiency curves are typical values and may
not be provided for all possible combinations of VIN, VOUT, and
IOUT. To account for these variations, it is necessary to include a
safety margin when calculating the power dissipated in the buck.
A third way to estimate the power dissipation is analytical and
involves modeling the losses in the buck circuit provided by
Equation 8 to Equation 11 and the losses in the LDOs provided
by Equation 12.
Buck Regulator Power Dissipation
The power loss of the buck regulator is approximated by
PLOSS = PDBUCK + PL
(3)
where:
PDBUCK is the power dissipation on the ADP5040 buck regulator.
PL is the inductor power losses.
The inductor losses are external to the device and they do not
have any effect on the die temperature.
The inductor losses are estimated (without core losses) by
L
RMS
OUT1
L
DCR
I
P
×
2
)
(
(4)
where:
DCRL is the inductor series resistance.
IOUT1(RMS) is the rms load current of the buck regulator.
/12
+
1
)
(
r
I
I
OUT1
RMS
OUT1
×
=
(5)
where r is the normalized inductor ripple current.
R ≈ VOUT1 × (1 − D)/(IOUT1 × L × fSW)
(6)
where:
L is inductance.
FSW is switching frequency.
D is duty cycle.
D = VOUT1/VIN1
(7)
The ADP5040 buck regulator power dissipation, PDBUCK,
includes the power switch conductive losses, the switch losses,
and the transition losses of each channel. There are other
sources of loss, but these are generally less significant at high
output load currents, where the thermal limit of the application
is. Equation 8 shows the calculation made to estimate the power
dissipation in the buck regulator.
PDBUCK = PCOND + PSW + PTRAN
(8)
The power switch conductive losses are due to the output current,
IOUT1, flowing through the PMOSFET and the NMOSFET power
switches that have internal resistance, RDSON-P and RDSON-N. The
amount of conductive power loss is found by:
PCOND = [RDSON-P × D + RDSON-N × (1 – D)] × IOUT12
(9)
For the ADP5040, at 125°C junction temperature and VIN1 =
3.6 V, RDSON-P is approximately 0.2 Ω, and RDSON-N is approximately
0.16 Ω. At VIN1 = 2.3 V, these values change to 0.31 Ω and 0.21 Ω,
respectively, and at VIN1 = 5.5 V, the values are 0.16 Ω and
0.14 Ω, respectively.
Switching losses are associated with the current drawn by the
driver to turn on and turn off the power devices at the switching
frequency. The amount of switching power loss is given by:
PSW = (CGATE-P + CGATE-N) × VIN12 × fSW
(10)
where:
CGATE-P is the PMOSFET gate capacitance.
CGATE-N is the NMOSFET gate capacitance.
For the ADP5040, the total of (CGATE-P + CGATE-N) is approximately
150 pF.
The transition losses occur because the PMOSFET cannot be
turned on or off instantaneously, and the SW node takes some
time to slew from near ground to near VOUT1 (and from VOUT1 to
ground). The amount of transition loss is calculated by:
PTRAN = VIN1 × IOUT1 × (tRISE + tFALL) × fSW
(11)
where tRISE and tFALL are the rise time and the fall time of the
switching node, SW. For the ADP5040, the rise and fall times of
SW are in the order of 5 ns.
If the preceding equations and parameters are used for
estimating the converter efficiency, note that the equations do
not describe all of the converter losses, and the parameter
values given are typical numbers. The converter performance
also depends on the choice of passive components and board
layout; therefore, a sufficient safety margin should be included
in the estimate.
LDO Regulator Power Dissipation
The power loss of a LDO regulator is given by:
PDLDO = [(VIN – VOUT) × ILOAD] + (VIN × IGND)
(12)
where:
ILOAD is the load current of the LDO regulator.
VIN and VOUT are input and output voltages of the LDO,
respectively.
IGND is the ground current of the LDO regulator.
Power dissipation due to the ground current is small and it
can be ignored.
The total power dissipation in the ADP5040 simplifies to:
PD = {[PDBUCK + PDLDO1 + PDLDO2]}
(13)



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