MC34708 datasheet(25/159 Pages) FREESCALE

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Analog Integrated Circuit Device Data



Freescale Semiconductor

MC34708

Functional Block Description

7.2

Bias and References Block Description and Application

Information

All regulators use the main bandgap as the reference. The main bandgap is bypassed with a capacitor at REFCORE. The

bandgap and the rest of the core circuitry is supplied from VCORE. The performance of the regulators is directly dependent on

the performance of VCOREDIG and the bandgap. No external DC loading is allowed on VCOREDIG or REFCORE. VCOREDIG

is kept powered as long as there is a valid supply and/or coin cell. Table 14 shows the main characteristics of the core circuitry.

Table 13. Power Up Sequence i.MX50

Tap x 2.0 ms PUMS [4:1] = [0100, 1011, 1100, 1101, 1110, 1111] (i.MX50/I.MX53)

SW2

SW3

SW1A/B

VDAC

SW4A/B, VREFDDR

SW5

VGEN2, VUSB2

VPLL

VGEN1

VUSB (32)

Notes:

32.

The VUSB regulator is only enabled if 5.0 V is present on the VBUS pin. By

default VUSB will be supplied by the VBUS pin.

Table 14. Core Voltages Electrical Specifications

Characteristics noted under conditions BP = 3.6 V, VBUS = 5.0 V, -40 C  TA  85 C, unless otherwise noted. Typical values

at BP = 3.6 V and TA = 25 °C under nominal conditions, unless otherwise noted.

Symbol

Characteristic

Min

Typ

Max

Unit

Notes

VCOREDIG (DIGITAL CORE SUPPLY)

VCOREDIG Output voltage

• ON mode and OFF with good battery mode, and charging

• RTC mode

1.5

0.0

(33)

CCOREDIG VCOREDIG bypass capacitor

1.0

F

VDDLP (DIGITAL CORE SUPPLY - LOWER POWER)

VDDLP

Output voltage

• ON mode with good battery

• OFF mode with good battery

• RTC mode

1.5

1.2

(34)

CDDLP

VDDLP bypass capacitor

100

(35)

VCORE (ANALOG CORE SUPPLY)

VCORE

Output voltage

• ON mode and charging

• OFF and RTC mode

2.775

0.0

(33)

CCORE

VCORE bypass capacitor

1.0

F

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