MC34708 datasheet(68/159 Pages) FREESCALE

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Analog Integrated Circuit Device Data



Freescale Semiconductor

MC34708

Functional Block Description

7.5.6.5

VPLL

VPLL is provided for isolated biasing of the application processors PLLs for clock generation, in support of protocol and peripheral

needs. Depending on the application and power requirements, this supply may be considered for sharing with other loads, but

noise injection must be avoided and filtering added, if necessary to ensure suitable PLL performance. The VPLL regulator has a

dedicated input supply pin.

VINPLL can be connected to either BP or a 1.8 V switched mode power supply rail such as from SW5 for the two lower set points

of each regulator VPLL[1:0] = [00], [01]. In addition, when the two upper set points (VPLL[1:0] = [10],[11]) are used, the VINPLL

inputs can be connected to either BP or a 2.2 V nominal external switched mode power supply rail, to improve power dissipation.

Table 56. VPLL Voltage Control

Parameter Value

Function

ILoad max

Input Supply

VPLL[1:0]

output = 1.2 V

50 mA

BP or 1.8 V

output = 1.25 V

50 mA

BP or 1.8 V

output = 1.50 V

50 mA

BP or External switch

output = 1.8 V

50 mA

BP or External switch

Table 57. VPLL Electrical Specification

Characteristics noted under conditions BP = 3.6 V, VBUS = 5.0 V,-40 C  TA  85 C, unless otherwise noted. Typical values at

BP = 3.6 V and TA = 25 °C under nominal conditions, unless otherwise noted.

Symbol

Characteristic

Min

Typ

Max

Unit

Notes

GENERAL

VINPLL

Operating Input Voltage Range

• VPLL all settings, BP biased

• VPLL [1:0] = 00, 01 (SW5 = 1.8 V)

• VPLL, [1:0] = 10, 11, External Switch

UVDET

1.75

2.15

1.8

2.2

4.5

IPLL

Operating current Load range

VPLL ACTIVE MODE – DC

VPLL

Output Voltage VOUT

•VINMIN < VIN < VINMAX,

•ILMIN < IL < ILMAX

VNOM

– 0.05

VNOM

+ 0.05

VPLL-LOPP Load Regulation

•1.0 mA < IL < ILMAX For any VINMIN < VIN < VINMAX

0.35

mV/mA

VPLL-LIPP

Line Regulation

•VINMIN < VIN < VINMAX For any ILMIN < IL < ILMAX

5.0

IPLL-Q

Quiescent Current

•VINMIN < VIN < VINMAX IL = 0

8.0

µA

VPLL ACTIVE MODE – AC

VPLLPSRR PSRR, IL = 75% of ILMAX, 20 Hz to 20 kHz

•VIN = UVDET

•VIN = VNOM + 1.0 V, > UVDET

VPLLNOISE Output Noise Density, VIN = VINMIN IL = 75% of ILMAX

• 100 Hz – 1.0 kHz

•> 1.0 kHz – 1.0 MHz

2.5

dB/dec

V/Hz

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