MCP795W21 datasheet(28/54 Pages) MAS

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MCP795WXX/MCP795BXX

DS22280A-page 28

Preliminary

 2011 Microchip Technology Inc.

9.1

Features

9.1.1

CALIBRATION

The Calibration register (0x09h) allows a number of

RTCC counts to be added or subtracted (Cal Sign bit

located at 0x03:7) each minute. This allows for

calibration to reduce the PPM error due to oscillator

shift. This register is volatile.

The CALSIGN determines if calibration is positive or

negative.

A value of 0x00 in the Calibration register will result in

no calibration.

The calibration is linear, with one bit representing two

RTC clocks.

The MCP795XXX utilizes digital calibration to correct

for the inaccuracies of the input clock source (either

external or crystal). Calibration is enabled by setting

the value of the Calibration register at address 08H.

Calibration is achieved by adding or subtracting a

number of input clock cycles per minute in order to

achieve ppm level adjustments in the internal timing

function of the MCP795XXX.

The CALSGN bit is the sign bit, with a ‘1’ indicating

subtraction and a ‘0’ indicating addition. The eight bits

in the calibration register indicate the number of input

clock cycles (multiplied by two) that are subtracted or

added per minute to the internal timing function.

The internal timing function can be monitored using

the CLKOUT output pin by setting bit 6 (SQWE) and

bits <2:0> (RS2, RS1, RS0) of the Control register at

address 07H. Note that the CLKOUT output waveform

is disabled when the MCP795XXX is running in VBAT

mode. With the SQWE bit set to ‘1’, there are two

methods that can be used to observe the internal

timing function of the MCP795XXX:

A. RS2 bit set to ‘0’

With the RS2 bit set to ‘0’, the RS1 and RS0 bits

enable the following internal timing signals to be

output on the CLKOUT pin:

The frequencies listed in the table presume an input

clock source of exactly 32.768 kHz. In terms of the

equivalent number of input clock cycles, the table

becomes:

With regards to the calibration function, the Calibration

output clock signal when bits RS1 and RS0 are set to

‘11’. The setting of the calibration register to a non-

zero value enables the calibration function which can

be observed on the CLKOUT output pin. The

calibration function can be expressed in terms of the

number of input clock cycles added/subtracted from

the internal timing function.

With bits RS1 and RS0 set to ‘00’, the calibration

function can be expressed as:

Since the calibration is done once per minute (i.e.

when the internal minute counter is incremented), only

one cycle in sixty of the CLKOUT output waveform is

affected by the calibration setting. Also note that the

duty cycle of the CLKOUT output waveform will not

necessarily be at 50% when the calibration setting is

applied.

With bits RS1 and RS0 set to ‘01’ or ‘10’, the

calibration function can not be expressed in terms of

the input clock period. In the case where the MSB of

the Calibration register is set to ‘0’, the waveform

appearing at the CLKOUT output pin will be “delayed”,

once per minute, by twice the number of input clock

cycles defined in the Calibration register. The CLKOUT

waveform will appear as shown in Figure 9-1.

RS2

RS1

RS0

Output Signal

1 Hz

4.096 kHz

8.192 kHz

32.768 kHz

RS2

RS1

RS0

Output Signal

32768

Toutput

(32768 +/- (2 * CALREG)) Tinput

where:

Toutput

clock period of CLKOUT output

signal

Tinput

clock period of input signal

CALREG

decimal value of calibration

determined by the CALSGN bit.

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