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MCP795W21 数据表(PDF) 4 Page - Micro Analog systems

部件名 MCP795W21
功能描述  SPI Real-Time Clock Calendar
PDF  54 Pages
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制造商  MAS [Micro Analog systems]
网页  http://www.mas-oy.com
标志 MAS - Micro Analog systems

MCP795W21 数据表(HTML) 4 Page - Micro Analog systems

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MCP795WXX/MCP795BXX
DS22280A-page 4
Preliminary
 2011 Microchip Technology Inc.
TABLE 1-2:
AC CHARACTERISTICS
AC CHARACTERISTICS
Industrial (I):
TAMB = -40°C to +85°C VCC = 1.8V to 5.5V
Param.
No.
Sym.
Characteristic
Min.
Max.
Units
Test Conditions
1FCLK
Clock Frequency
—
—
—
10
5
3
MHz
MHz
MHz
4.5V
Vcc  5.5V
2.5V
Vcc  4.5V
1.8V
Vcc  2.5V
2TCSS
CS Setup Time
50
100
150
—
—
—
ns
ns
ns
4.5V
Vcc  5.5V
2.5V
Vcc  4.5V
1.8V
Vcc  2.5V
3TCSH
CS Hold Time
50
100
150
—
—
—
ns
ns
ns
4.5V
Vcc  5.5V
2.5V
Vcc  4.5V
1.8V
Vcc  2.5V
4TCSD
CS Disable Time
50
—
ns
—
5
Tsu
Data Setup Time
10
20
30
—
—
—
ns
ns
ns
4.5V
Vcc  5.5V
2.5V
Vcc  4.5V
1.8V
Vcc  2.5V
6THD
Data Hold Time
20
40
50
—
—
—
ns
ns
ns
4.5V
Vcc  5.5V
2.5V
Vcc  4.5V
1.8V
Vcc  2.5V
7TR
CLK Rise Time
—
100
ns
(Note 1)
8TF
CLK Fall Time
—
100
ns
(Note 1)
9THI
Clock High Time
50
100
150
—
—
—
ns
ns
ns
4.5V
Vcc  5.5V
2.5V
Vcc  4.5V
1.8V
Vcc  2.5V
10
TLO
Clock Low Time
50
100
150
—
—
—
ns
ns
ns
4.5V
Vcc  5.5V
2.5V
Vcc  4.5V
1.8V
Vcc  2.5V
11
TCLD
Clock Delay Time
50
—
ns
—
12
TCLE
Clock Enable Time
50
—
ns
—
13
TV
Output Valid from Clock
Low
—
—
—
50
100
160
ns
ns
ns
4.5V
Vcc  5.5V
2.5V
Vcc  4.5V
1.8V
Vcc  2.5V
14
THO
Output Hold Time
0
—
ns
(Note 1)
15
TDIS
Output Disable Time
—
—
—
40
80
160
ns
ns
ns
4.5V
Vcc  5.5V (Note 1)
2.5V
Vcc  4.5V (Note 1)
1.8V
Vcc  2.5V (Note 1)
16
TWC
Internal Write Cycle Time
—
5
ms
(Note 3)
17
—
Endurance
1,000,000
—
E/W
Cycles
(Note 2)
Note 1: This parameter is periodically sampled and not 100% tested.
2: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site:
www.microchip.com.
3: TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle
is complete.



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