TNETE2008

OctalPHY

EIGHT 10BASE-T PHYSICAL-LAYER INTERFACES

SPWS042B – DECEMBER 1997 – REVISED JUNE 1998

22

POST OFFICE BOX 655303

electrical characteristics over recommended operating conditions (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VOH

High-level output voltage

IOH = MAX

2.4

V

VOL

Low-level output voltage

IOL = MAX

0.5

V

IOZ

High-impedance current

±10

µA

IIH

High-level output current

VIN = MAX

±10

µA

IIL

Low-level output current

VIN = GND

±10

µA

IDD

Supply current

VDD = MAX

See Note 4

110

125

mA

IDD

Supply current

VDD = MAX

See Note 5

220

280

mA

Cdin

Digital inputs

1.5

pF

Cdout

Digital outputs

1

pF

Clsel

LED select outputs (LSELxx)

3.5

pF

Clstat

LED status outputs

10

pF

Cjin

JTAG inputs

2.5

pF

Cjout

JTAG outputs

3

pF

NOTES:

4. Full-duplex mode, while transmitting and receiving maximum data packet size with correct line termination and minimum interframe

gaps. This is a per-port value.

5. Full-duplex mode, valid link on all PHYs, and no data activity. This is total device value.

oscillator requirements

MIN

NOM

MAX

UNIT

CLK frequency

20

MHz

CLK frequency error

–100

100

ppm

CLK duty cycle

40

60

%

VOH

2

VDD

V

Trise, Tfall (see Note 6)

6

ns

NOTE 6: Measured at 10%–90% transistion low-to-high or high-to-low points

operating characteristics over recommended operating conditions

clock sync delay (see Figure 10)

NO.

PARAMETER

MIN

MAX

UNIT

1

td(IFSYNC)

Delay time from IFCLK

↑ to IFSYNC state change

–2

10

ns

1

IFCLK

(output)

IFSYNC

(output)

1

Figure 10. Clock Sync Delay