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TNETE2008 数据表(PDF) 26 Page - Texas Instruments |
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TNETE2008 数据表(HTML) 26 Page - Texas Instruments |
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26 / 33 page ![]() TNETE2008 OctalPHY EIGHT 10BASE-T PHYSICAL-LAYER INTERFACES SPWS042B – DECEMBER 1997 – REVISED JUNE 1998 26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 receive-data timing The TNETE2008 buffers receive data in an elastic first-in, first-out (FIFO) buffer so that receive data can be synchronous to the TNETE2008 20-MHz clock. receive data (see Figure 15) NO. PARAMETER MIN TYP MAX UNIT 1 td(RDLAT) Receive-data latency time 1350 1950 2550 ns 2 td(CRS) Carrier sense assertion delay 125 850 1300 ns 3 td(RDV) Delay time, from RCVP/RCVN valid to IFRXD valid 1800 2850 3800 ns 4 td(CRSHO) Delay time, from RCVP/RCVN idle to IFCRS ↓ 0 0 450 ns RCVP/ RCVN (input) IFCLK (output) IFSYNC (output) IFCRS (output) IFRXDV (output) 2 4 3 1 Figure 15. Receive Data |
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