TNETE2008

OctalPHY

EIGHT 10BASE-T PHYSICAL-LAYER INTERFACES

SPWS042B – DECEMBER 1997 – REVISED JUNE 1998

10

POST OFFICE BOX 655303

10BASE-T differential line-transmitter function

Each TNETE2008 differential line driver drives a balanced, properly terminated twisted-pair transmission line

with a nominal characteristic impedance of 100

Ω. In the idle state, the driver maintains a minimum differential

output voltage while staying within the required common-mode voltage range.

The driver incorporates an on-chip wave-shaping and high-frequency filtering stage so the outputs can be

connected directly to isolation transformers through series-termination resistors. No external filters are

required.

After transmission has ceased on a PHY, and for a minimum of 250 ns, the driver maintains full differential

outputs, which thereafter begin to decay to the minimum differential level.

Each PHY also transmits regular link pulses in compliance with IEEE Std 802.3.

In half-duplex mode, interface carrier sense (IFCRS) asserts during transmits.

10BASE-T differential line-receiver function

The line-receiver terminals of each PHY must be connected to a properly terminated transmission line via an

external isolation transformer. The receiver establishes its own common-mode input-bias voltage. Data

received from the network is output on the IFRXD terminals of the interface.

The receiver incorporates an intelligent squelch function that allows incoming data to pass only if the input

amplitude is greater than a minimum signal threshold and a specific pulse sequence is received. This protects

against impulse line noise being mistaken for signal or line activity. The squelch circuits quickly deactivate if

received pulses fall outside the specifications. Over-long pulses are not mistaken as link pulses.

There are two choices for signal thresholds via the RCVTHRESH terminal. Selecting the lower squelch value

(selected by pulling RCVTHRESH high) may operate over longer cables but does not meet IEEE minimum

squelch levels. For this reason, it is recommended that this terminal be tied low. Each channel’s squelch circuit

contains an MLT-3 (100BASE-T data format) detector, which, when enabled via MLT3BLOCK pulled high,

prevents the receiver from opening the squelch when MLT-3 data is present.

IFCRS is asserted while the squelch function is active to indicate that the circuit is allowing data to pass from

the twisted pair. IFCRS is deasserted when the squelch circuit is disabling data flow, although the receive elastic

buffer still may be outputting data.

jabber detection

Each PHY monitors the length of the packet being transmitted. If a single packet exceeds 24 ms, then a jabber

condition is flagged. The output is disabled, the IFCOL (collision) signal is asserted, and the IFCRS signal is

deasserted. To clear the jabber function, it is necessary to cease transmission for a minimum of 400 ms.

link test

When not in autonegotiation mode, each PHY transmits link pulses on the XMTP/XMTN outputs, separated by

an interval of 19 ms.

The receiver looks for valid link pulses on the input pair. If a link pulse is not received within a given time

interval,

≅ 100 ms, then the PHY enters a link-fail state. In this state, link pulses continue to be generated, and

the receiver constantly looks for the link-pulse pattern. The PHY remains in this state until a valid receive packet

or multiple legal link test pulses are received. When link pulses are not detected, the IFLINK signal is deasserted

and transmission of data is inhibited. Also, an activated enabled MLT-3 decoder inhibits the receive function for

MLT-3 encoded data and can, therefore, prevent assertion of IFLINK or, if already asserted, cause deassertion

of IFLINK if the MLT-3 encoded data persists for longer than 100 ms.