SST49LF040 datasheet(17/48 Pages) SST

17 / 48 page

Advance Information

4 Mbit LPC Flash

SST49LF040

S71213-00-000

11/01 562

Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum

Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation

of the device at these conditions or conditions greater than those defined in the operational sections of this

datasheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.)

Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C

Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C

D.C. Voltage on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VDD+0.5V

Transient Voltage (<20 ns) on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.0V to VDD+2.0V

Package Power Dissipation Capability (Ta=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0W

Surface Mount Lead Soldering Temperature (3 Seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240°C

Output Short Circuit Current1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA

1. Outputs shorted for no more than one second. No more than one output shorted at a time.

OPERATING RANGE

Range

Ambient Temp

VDD

Commercial

0°C to +85°C

3.0-3.6V

AC CONDITIONS OF TEST

Input Rise/Fall Time . . . . . . . . . . . . . . . 3 ns

Output Load . . . . . . . . . . . . . . . . . . . . . CL = 30 pF

See Figures 29 and 30

TABLE

9: DC OPERATING CHARACTERISTICS (ALL INTERFACE)

Symbol

Parameter

Limits

Test Conditions1

1. Test conditions apply to PP mode.

Min

Max

Units

IDD

Active VDD Current

Address input=VIL/VIH, at f=1/TRC Min,

VDD=VDD Max

Read

OE#=

VIL, WE#=VIH, All I/Os open

Write2

2. IDD active while Erase or Program is in progress.

OE#=

VIH, VDD=VDD Max

ISB

Standby VDD Current

(LPC Interface)

100

µA

LFRAME#=VIH, f=33 MHz, CE#=VIH

VDD=VDD Max,

All other inputs

≥ 0.9 VDD or ≤ 0.1 VDD

IRY3

3. The device is in Ready Mode when no activity is on the LPC bus.

Ready Mode VDD Current (LPC Interface)

LFRAME#=VIL, f=33 MHz, VDD=VDD Max

All other inputs

≥ 0.9 VDD or ≤ 0.1 VDD

Input Current for IC:

ID[3:0] pins for SST49LF040

ID[3:1] pins for SST49LF080A

200

µA

VIN=GND to VDD, VDD=VDD Max

ILI

Input Leakage Current

µA

VIN=GND to VDD, VDD=VDD Max

ILO

Output Leakage Current

µA

VOUT=GND to VDD, VDD=VDD Max

VIHI

INIT# Input High Voltage

1.1

VDD+0.5

VDD=VDD Max

VILI

INIT# Input Low Voltage

-0.5

0.4

VDD=VDD Max

VIL

Input Low Voltage

-0.5

0.3 VDD

VVDD=VDD Min

VIH

Input High Voltage

0.5 VDD VDD+0.5

VDD=VDD Max

VOL

Output Low Voltage

0.1 VDD

VIOL=1500µA, VDD=VDD Min

VOH

Output High Voltage

0.9 VDD

VIOH=-500 µA, VDD=VDD Min

T9.1 562

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