STPM10 datasheet(19/51 Pages) STMICROELECTRONICS

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STPM10

Theory of operation

Doc ID 17728 Rev 3

19/51

With the same clock frequency, if the line frequency is 130 Hz, the fCLK/4 pulses between

two LIN trailing edges are 8066, less than 213 (8192). The BFR high frequency limit is then:

fCLK/2

15 = 4194304/32768 = 128 Hz.

The BFR flag is also set if the register value of the RMS voltage drops below 64. BFR is

cleared when the register value goes above 128. The BFR, then, also gives information

about the presence of the line voltage within the meter.

When the BFR error is set, the computation of power is zero unless the FRS bit is set.

In fact, the effect of the BFR bit can be overridden by setting FRS configuration bit.

It means that if FRS is set and BFR is also set, all the energy computation is carried on as

BFR was cleared. In this case then p=u*i, where u could be zero or not (if BFR was set

because voltage RMS register value is below 64).

When the line frequency re-enters the nominal band, the BFR flag is automatically reset.

This BFR error flag is also assembled as part of the 8-bit status register (see Table 10).

7.6

Power supply

The main STPM10 supply pin is the VCC pin. From the VCC pin two linear regulators

provide the necessary voltage for the analog part VDDA (3 V) and for the digital part VDDD

(1.8 V).

The VSS pin represents the reference point for all the internal signals. A 100 nF low ESR

capacitor should be connected between VCC and VSS, VDDA and VSS, VDDD and VSS.

All these capacitors must be located very close to the device.

The STPM10 contains a power on reset (POR) detection circuit. If the VCC supply is less

than 2.5 V, then the STPM10 goes into an inactive state, all the functions are blocked and a

reset condition is asserted. This is useful to ensure correct device operation at power-up

and during power-down. The power supply monitor has built-in hysteresis and filtering,

which give a high degree of immunity from false triggering due to noisy supplies.

A band-gap voltage reference (VBG) of 1.23 V ±1% is used as the reference voltage level

source for the two linear regulators and for the A/D converters. Also, this module produces

several bias currents and voltages for all other analog modules. The band-gap voltage can

be compensated regardless of the temperature variations with the BGTC bits.

Figure 17.

Band-gap temperature variation

1,20

1,21

1,22

1,23

1,24

1,25

1,26

1,27

1,28

1,29

-40

Temperature °C

BGTC=0

BGTC=1

BGTC=2

BGTC=3

100