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STPM10 数据表(PDF) 35 Page - STMicroelectronics |
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STPM10 数据表(HTML) 35 Page - STMicroelectronics |
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35 / 51 page ![]() STPM10 Theory of operation Doc ID 17728 Rev 3 35/51 1 bit DATA value+6-bits address+1 bit (0 or 1) as depicted in Figure 25. In this case the binary command is 01011111 (0x5F), which is the one depicted, or 01011110 (0x5E): t1 → t2 (> 30 ns): SPI out of idle state t2 → t3 (> 30 ns): SPI enabled for write operation t3: data value is placed in SDA t4: SDA value is stable and shifted into the device t3 → t5 (> 10 µs): writing clock period t3 → t5: 1 bit data value t5 → t6: 6 bit address of the destination latch t6 → t7: 1 bit EXE command t8: end of SPI writing t9: SPI enters idle state The same procedure should be applied for the mode signals, but in this case the 6-bit address must be taken from Table 12. The LSB of the command is also called the EXE bit because instead of the data bit value, the corresponding serial clock pulse is used to generate the necessary latching signal. This way the writing mechanism does not need the measurement clock in order to operate, which makes the operation of SPI module of STPM10 completely independent from the rest of device logic except for the signal POR. Commands for changing system signals should be sent during active signals SCS and SYN, as shown in Figure 25. The SYN must be put low in order to disable the SDA output driver of the STPM10 and make the SDA an input pin. A string of commands can be sent within one period of active SCS and SYN signals, or a command can be followed by reading the data record. However, in this case, the SYN should be deactivated in order to enable the SDA output driver, and a SYN pulse should be applied before activation of the SCS in order to latch the data. Figure 25. Timing for writing configuration and mode bits |
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