STPM10 datasheet(31/51 Pages) STMICROELECTRONICS

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STPM10

Theory of operation

Doc ID 17728 Rev 3

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– CSEL: In normal operation, if the anti-tamper module is not activated (see PST

configuration bits) the STPM10 selects channel 1 as the source of current

information. For debug or calibration purposes it is possible to select channel 2 as the

source of the current channel signal when the tamper module is disabled. This is

done by setting the CSEL mode bit.

– Precharge: This command swaps the sequence of data records read, allowing the

reading of the last four data records first, and the first four second. The reading

sequence is 5, 6, 7, 8, 1, 2, 3, 4. Unlike the other mode signals, the precharge

command is not retained inside the STPM10, but should be sent each time before the

reading of the data records.

– BANK: it is used to activate RC oscillator (see Chapter 7.11.1).

7.19

SPI interface

The SPI interface supports a simple serial protocol, which is implemented to enable

communication between some master system (microcontroller or PC) and the device.

Three tasks can be performed with this interface:

–

remote resetting of the device

–

reading data records

–

writing the mode bits and the configuration bits

Four pins of the device are dedicated to this purpose: SCS, SYN, SCL and SDA.

SCS, SYN and SCL are all input pins, while SDA can be input or output according to

whether the SPI is in write or read mode. A high-level signal for these pins means a voltage

level higher than 0.75 x VCC, while a low-level signal means a voltage value lower than 0.25

x VCC.

The internal registers are not directly accessible. Instead, 32 bits of transmission latches are

used to pre-load the data before being read or written to the internal registers.

The condition in which SCS, SYN and SCL inputs are set to high level determines the idle

state of the SPI interface, and no data transfer occurs.

–

SCS: enables SPI operation when low.

–

SYN: operates different functions according to the status of the SCS pin. When

SCS is low, the SYN pin status selects if the SPI is in read (SYN = 1) or write

mode (SYN = 0). When the SCS is high and SYN is also high, the results of the

input or output data are transferred to the transmission latches.

–

SCL: basically the clock pin of the SPI interface. This pin function is also controlled

by the SCS status. If SCS is low, SCL is the input of the serial bit synchronization

CSEL

Current channel 1 selected when tamper is disabled

0111 100x

78 or 79

Current channel 2 selected when tamper is disabled

1111 100x

F8 or F9

Reserved

Precharge

Swap the 32-bit data record readings. From

1,2,3,4,5,6,7,8, to 5,6,7,8,1,2,3,4 and vice-versa

1111111x

Table 12.

Mode signal description (continued)

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