SPEAR1310 datasheet(7/57 Pages) STMICROELECTRONICS

部件名	SPEAR1310

功能描述	Dual-core Cortex A9 embedded MPU for communications

PDF	57 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

标志

7 / 57 page

SPEAr1310

Description

Doc ID 17528 Rev 4

7/57

port can be programmed and optimized through an internal, weighted round-robin (WRR)

arbitration scheme.

Figure 2 is the internal connectivity block diagram.

Figure 2.

SPEAr1310 block diagram of the internal connectivity

2x Giga/Fast Ethernet

3x Fast Ethernet

MCIF

Memory card interface

FSMC

Flash/SRAM controller

SMI

Serial memory interface

1x USB OTG

2x UHC

USB Host controller

2x HDLC (TDM/E1)

EXPI

Expansion interface

Crypto accelerator

Reset and clock

control

3x PCIe

MPMC

DDR2/3 controller

2x CAN

6x UART

SSP

2x I2C

ADC

KBD

keyboard

2x I2S

RTC

GPIO

2x DMAC

A9 Subsystem Module

SCU

cache2cache

transfers

Snoop

filtering

Timers

FPU

A9 CPU

Instr

Cache

FPU

PTM

I/F

A9 CPU

Instr

Cache

Data

Cache

32 KB BootROM

Network-on-chip

JPEG

Codec

32 KB RAM

Data

Cache

PTM

L2 cache

2x HDLC (RS485)

3x SATA

MISC

Power management

OTP memory

Temp. sensor (THSENS)

LCD display

controller

PCI 32-bit @ 66 MHz

SPEAR1310 数据表(PDF) 7 Page - STMicroelectronics

SPEAR1310 数据表(HTML) 7 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57

数据表下载

链接网址

SPEAR1310 数据表(PDF) 7 Page - STMicroelectronics

SPEAR1310 数据表(HTML) 7 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57

数据表 下载

链接网址

数据表下载