SPEAR1310 datasheet(25/57 Pages) STMICROELECTRONICS

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SPEAr1310

PCI Express (PCIe)

Doc ID 17528 Rev 4

25/57

PCI Express (PCIe)

The PCI Express (PCIe) core incorporates a dual mode (DM) core which can implement a

PCIe interface for a PCIe Root Complex (RC) or Endpoint (EP). The dual mode core can

operate in EP or RC port modes, depending on the value sampled on the core input at

power-on reset. The DM core can be switched between modes at runtime by applying a

power-on reset.

PCI Express is compliant with the PCI Express Base 2.0 specification and supports PHYs

with the PIPE 1.87 or PxPIPE interface specification. As a consequence, it is also compliant

with the PCIe 1.1 specification.

The core features a proprietary user-configurable and high-performance application

interface for generating and receiving PCIe traffic. It is available with standard AMBA 3 AXI

interfaces.

13.1

Main features

Typical applications for a PCI Express device built with the DM core include:

●

Motherboard components for desktop and mobile computers

●

Graphics devices

●

Add-in cards for desktop and mobile computers

●

Components and add-in cards in server applications

●

Embedded applications

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Data communications equipment

●

Telecommunications equipment

●

Storage devices

●

Wireless devices

●

Other applications

The DM core in EP mode supports PCI Express Legacy Endpoint devices. However, the

application must ensure that the device obeys the Legacy Endpoint device rules defined in

the PCI Express Base 2.0 specification.

Note:

The core is not intended for use in a root complex integrated endpoint.

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