SPEAR1340 datasheet(11/200 Pages) STMICROELECTRONICS

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SPEAr1340

Device functions

Doc ID 023063 Rev 4

11/200

2.7

USB 2.0 Host controllers (UHC)

The SPEAr1340 device integrates 2 USB Host interfaces. Each interface provides a high-

speed Host controller (EHCI standard) and a full-speed/low-speed controller (OHCI

standard). The UHC has 2 physical ports (2 separate instances) that are fully compliant with

the Universal Serial Bus specification (version 2.0), and provides an interface to the

industry-standard AHB bus.

Main features:

●

A PHY interface implementing a USB 2.0 transceiver macro-cell interface plus (UTMI+)

fully compliant with UTMI+ specification (revision 1.0), to execute serialization and de-

serialization of transmissions over the USB line

●

Either 30 MHz clock for 16-bit interface or 60 MHz for 8-bit interface supported by the

UTMI + PHY interface

●

A USB 2.0 host controller (UHC) connected to the AHB bus that generates the

commands for the UTMI+PHY

●

Complies with both the enhanced host controller interface (EHCI) specification (version

1.0) and the open host controller interface (OHCI) specification (version 1.0a)

●

The UHC supports the 480 Mbps high-speed (HS) for USB 2.0 through an embedded

EHCI Host Controller, as well as the 12 Mbps full-speed (FS) and the 1.5 Mbps low-

speed (LS) for USB 1.1 through one integrated OHCI Host controller

●

All clock synchronization is handled within the UHC

●

An AHB slave for each controller (1 EHCI and 1 OHCI), acting as programming

interface to access to control and status registers

●

An AHB master for each controller (1 EHCI and 1 OHCI) for data transfer to system

memory, supporting 8-, 16-, and 32-bit wide data transactions on the AHB bus

●

32-bit AHB bus addressing

2.8

USB 2.0 OTG port (UOC)

Main features:

●

Complies with the On-The-Go supplement to the USB 2.0 specification (revision 1.3)

●

Supports the Session Request Protocol (SRP)

●

Supports the Host Negotiation Protocol (HNP)

●

A PHY interface implementing the USB 2.0 transceiver macrocell interface (UTMI+

specification, revision 1.0 (Level 3)) to execute serialization and de-serialization of

transmissions over the USB line

●

Unidirectional and bidirectional 16-bit UTMI data bus interfaces

●

Support for the following speeds:

–

High speed (HS): 480 Mbps

–

Full speed (FS): 12 Mbps

–

Low speed (LS): 1.5 Mbps (only in Host mode)

●

Both of the DMA and slave-only modes are supported

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