M95320-R datasheet(22/48 Pages) STMICROELECTRONICS

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Instructions

M95320-W M95320-R M95320-DR

22/48

Doc ID 5711 Rev 14

When the Status Register Write Disable (SRWD) bit in the Status Register is set to 1, two

cases should be considered, depending on the state of the Write Protect (W) input pin:

●

If Write Protect (W) is driven high, it is possible to write to the Status Register (provided

that the WEL bit has previously been set by a WREN instruction).

●

If Write Protect (W) is driven low, it is not possible to write to the Status Register even if

the WEL bit has previously been set by a WREN instruction. (Attempts to write to the

Status Register are rejected, and are not accepted for execution). As a consequence,

all the data bytes in the memory area, which are Software-protected (SPM) by the

Block Protect (BP1, BP0) bits in the Status Register, are also hardware-protected

against data modification.

Regardless of the order of the two events, the Hardware-protected mode (HPM) can be

entered by:

●

either setting the SRWD bit after driving the Write Protect (W) input pin low,

●

or driving the Write Protect (W) input pin low after setting the SRWD bit.

Once the Hardware-protected mode (HPM) has been entered, the only way of exiting it is to

pull high the Write Protect (W) input pin.

If the Write Protect (W) input pin is permanently tied high, the Hardware-protected mode

(HPM) can never be activated, and only the Software-protected mode (SPM), using the

Block Protect (BP1, BP0) bits in the Status Register, can be used.

6.5

Read from Memory Array (READ)

As shown in Figure 11, to send this instruction to the device, Chip Select (S) is first driven

low. The bits of the instruction byte and address bytes are then shifted in, on Serial Data

Input (D). The address is loaded into an internal address register, and the byte of data at

that address is shifted out, on Serial Data Output (Q).

Figure 11.

Read from Memory Array (READ) sequence

Depending on the memory size, as shown in Table 5, the most significant address bits are Don’t Care.

If Chip Select (S) continues to be driven low, the internal address register is incremented

automatically, and the byte of data at the new address is shifted out.

AI01793D

3456789 10

20 21 22 23 24 25 26 27

14 13

3210

28 29 30

76543

High Impedance

Data Out 1

Instruction

16-Bit Address

MSB

Data Out 2

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