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M95320-R 数据表(PDF) 36 Page - STMicroelectronics

部件名 M95320-R
功能描述  32-Kbit serial SPI bus EEPROM with high-speed clock
PDF  48 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

M95320-R 数据表(HTML) 36 Page - STMicroelectronics

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DC and AC parameters
M95320-W M95320-R M95320-DR
36/48
Doc ID 5711 Rev 14
Table 17.
AC characteristics (M95320-W, device grade 6)
Test conditions specified in Table 10 and Table 11
Symbol
Alt.
Parameter
Min.
Max.
Min.
Max.
Unit
VCC = 2.5 to 5.5 V
New products
VCC = 4.5 to 5.5 V
fC
fSCK
Clock frequency
D.C.
10
D.C.
20
MHz
tSLCH
tCSS1 S active setup time
30
15
ns
tSHCH
tCSS2 S not active setup time
30
15
ns
tSHSL
tCS
S deselect time
40
20
ns
tCHSH
tCSH
S active hold time
30
15
ns
tCHSL
S not active hold time
30
15
ns
tCH
(1)
tCLH
Clock high time
42
20
ns
tCL
(1)
tCLL
Clock low time
40
20
ns
tCLCH
(2)
tRC
Clock rise time
2
2
µs
tCHCL
(2)
tFC
Clock fall time
2
2
µs
tDVCH
tDSU
Data in setup time
10
5
ns
tCHDX
tDH
Data in hold time
10
10
ns
tHHCH
Clock low hold time after HOLD not active
30
15
ns
tHLCH
Clock low hold time after HOLD active
30
15
ns
tCLHL
Clock low set-up time before HOLD active
0
0
ns
tCLHH
Clock low set-up time before HOLD not active
0
0
ns
tSHQZ
(2)
tDIS
Output disable time
40
20
ns
tCLQV
(3)
tV
Clock low to output valid
40
20
ns
tCLQX
tHO
Output hold time
0
0
ns
tQLQH
(2)
tRO
Output rise time
40
20
ns
tQHQL
(2)
tFO
Output fall time
40
20
ns
tHHQV
tLZ
HOLD high to output valid
40
20
ns
tHLQZ
(2)
tHZ
HOLD low to output high-Z
40
20
ns
tW
tWC
Write time
5
5
ms
1.
tCH + tCL must never be lower than the shortest possible clock period, 1/fC(max).
2.
Characterized only, not tested in production.
3.
tCLQV must be compatible with tCL (clock low time): if the SPI bus master offers a Read setup time tSU = 0 ns, tCL can be
equal to (or greater than) tCLQV; in all other cases, tCL must be equal to (or greater than) tCLQV+tSU.



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