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WM8213SCDS/V 数据表(PDF) 4 Page - Wolfson Microelectronics plc |
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WM8213SCDS/V 数据表(HTML) 4 Page - Wolfson Microelectronics plc |
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4 / 38 page  WM8213 Production Data w PD Rev 4.1 July 2008 4 PIN DESCRIPTION PIN NAME TYPE DESCRIPTION 1 RINP Analogue input Red channel input video. 2 AGND2 Supply Analogue ground reference. 3 DVDD1 Supply Digital supply for logic and clock generator. This must be operated at the same potential as AVDD. 4 OEB Digital input Output Hi-Z control, all digital outputs disabled when register bit OEB = 1 or register bit OPD = 1. 5 VSMP Digital input Video sample timing pulse. 6 RSMP Digital input Reset sample timing pulse (also used for RLC control). 7 MCLK Digital input Master (ADC) clock. This determines the ADC conversion rate. 8 DGND Supply Digital ground reference. 9 SEN Digital input Enables the serial interface when high. 10 DVDD2 Supply Digital supply, all digital I/O pins. 11 SDI Digital input Serial data input. 12 SCK Digital input Serial clock. Digital multiplexed output data bus. ADC output data (d15:d0) is available in multiplexed format as shown. See ‘Output Formats’ description in Device Description section for details of other output modes. A B 13 OP[0] Digital output d8 d0 14 OP[1] Digital output d9 d1 15 OP[2] Digital output d10 d2 16 OP[3] Digital output d11 d3 17 OP[4] Digital output d12 d4 18 OP[5] Digital output d13 d5 19 OP[6] Digital output d14 d6 d15 d7 20 OP[7]/SDO Digital output Alternatively, pin OP[7]/SDO may be used to output register read-back data when register bit OEB = 0, OPD = 0 and SEN has been pulsed high. See Serial Interface description in Device Description section for further details. 21 AVDD Supply Analogue supply. This must be operated at the same potential as DVDD1. 22 AGND1 Supply Analogue ground reference. 23 VRB Analogue output Lower reference voltage. This pin must be connected to AGND via a decoupling capacitor. 24 VRT Analogue output Upper reference voltage. This pin must be connected to AGND via a decoupling capacitor. 25 VRX Analogue output Input return bias voltage. This pin must be connected to AGND via a decoupling capacitor. 26 VRLC/VBIAS Analogue I/O Selectable analogue output voltage for RLC or single-ended bias reference. This pin would typically be connected to AGND via a decoupling capacitor. VRLC can be externally driven if programmed Hi-Z. 27 BINP Analogue input Blue channel input video. 28 GINP Analogue input Green channel input video. |
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