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AS5502 数据表(PDF) 23 Page - ams AG |
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AS5502 数据表(HTML) 23 Page - ams AG |
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23 / 26 page  6.6 CKTX -Test (pattern test) ZC-Trigger Test included ! min typ max Condition Freq1(CLR/T) - 600Hz - TxMode, BD1=L, BD2=L Freq2(CLR/T) - 1200Hz - TxMode, BD1=H, BD2=L Freq3(CLR/T) - 1200Hz - TxMode, BD1=L, BD2=H Freq4(CLR/T) - 2400Hz - TxMode, default 6.7 TX-Timeout Test TestMode3: 3sec timeout divided by 256 min typ max Condition TxEn H=>L ... M1M/P1M-bias off 11.5ms 3/256sec 12.0ms TestMode3 (pattern test) 6.8 PLL -Test (SCCLK) Cafcf = 10nF Tsettle=5ms min typ max Condition Freq1(CKSYS) -0.8% 1.032MHz +0.8% TestMode2, MRK1-9=0, BD1=L Freq2(CKSYS) -0.8% 2.263MHz +0.8% TestMode2, MRK1-9=511, BD1=H Freq3(CKSYS) -0.8% 1.850MHz +0.8% TestMode2, MRK1-9=341, BD1=L Freq4(CKSYS) -0.8% 1.445MHz +0.8% TestMode2, MRK1-9=170, BD1=H Phase Jitter - - +/-50ns TestMode2, M82 6.9 FSYNTH -Test (FMIXER) min typ max Condition Freq1(CKSYS) -0.5% 66.9kHz +0.5% TestMode3, MRK1-9=0, BD1=L Freq2(CKSYS) -0.5% 146.55kHz +0.5% TestMode3, MRK1-9=511, BD1=H Freq3(CKSYS) -0.5% 118.05kHz +0.5% TestMode3, MRK1-9=341, BD1=L Freq4(CKSYS) -0.5% 95.4kHz +0.5% TestMode3, MRK1-9=170, BD1=H Phase Jitter - - +/-100ns TestMode3, M82 6.10 TXOUT -Test Testcircuit: (similar to the circuit shown on page 12) VDD=5.0V min typ max Condition Freq1(Vout) -0.05% 81.75kHz +0.05% TxMode, M82, TXD=H Freq2(Vout) -0.05% 82.35kHz +0.05% TxMode, M82, TXD=L Freq3(Vout) -0.05% 82.95kHz +0.05% TxMode, M82,TXD=L,BD1=H Freq4(Vout) -0.05% 63.90kHz +0.05% TxMode, MRK1-9=0, TXD=H Freq5(Vout) -0.05% 140.55kHz +0.05% TxMode, MRK1-9=511, TXD=H Freq6(Vout) -0.05% 115.05kHz +0.05% TxMode, MRK1-9=341, TXD=H Freq7(Vout) -0.05% 89.40kHz +0.05% TxMode, MRK1-9=170, TXD=H VppV24(Vout) 12Vpp 13.0Vpp 14Vpp TxMode, M82,BD1=H,TXD=L/H VppV12(Vout) 6.0Vpp 6.5Vpp 7.0Vpp TxMode, M82,BD1=H,TXD=L/H AS5501 / AS5502 Multimode Powerline Modem Data Sheet Rev A, May 2000 Page 22/25 |
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