Default Setting: The default values shown in the table above, are related to the standard

version of this device.

(Default setting of the registers can be changed by modification of the IC’s metal2 layer.

In this way special versions of this device can be defined and produced which are identified

by different marking (see paragr. 2). A special version will however only be installed for

annual deliveries not lower than 100000 devices and against upfront funding for the special

tooling required.)

Serial Interface Operation:

The serial interface is built to work in two different modes. The mode of operation is defined

by the logical state of the signal SCLK sampled (using the first rising edge of Fosc/512

signal) 46usec after a high going edge of the reset signal (RESN).

A-Mode (standard)

Features:

- 2 or 3 wire serial bus

- 8 bit data format

- data gets clocked on rising edge and shifted on falling edge of SCLK

- default polarity of signal SCLK is LOW (CPOL=0, CPMA=0)

- single and sequential read and write operations possible

- D7 is first bit

valid

valid

valid

valid

SCLK

SD-IN

AO/CS

MSB

LSB

tcssu

tdsu tdhd

tcshd

WRITE OPERATION

tspick

valid

valid

SCLK

SD-IN

AO/CS

header

READ OPERATION

SD-OUT

address

D7

D0

AS5501 / AS5502 Multimode Powerline Modem

Data Sheet

Rev A, May 2000

Page 5/25