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AD9433/PCB 数据表(PDF) 10 Page - Analog Devices

部件名 AD9433/PCB
功能描述  12-Bit, 105 MSPS/125 MSPS IF Sampling A/D Converter
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9433/PCB 数据表(HTML) 10 Page - Analog Devices

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REV. 0
AD9433
–10–
DUTY CYCLE HIGH – %
–60
020
–65
–70
–75
–80
–85
–90
–95
2ND HARMONIC (dBc)
3RD HARMONIC (dBc)
WORST OTHER (dBc)
SNR (dB)
30
40
50
60
70
80
90
10
TPC 13. Dynamic Performance vs. Encode Duty Cycle
fS = 105 MSPS, fIN = 49.3 MHz, Differential AIN @ –0.5 dBFS,
SFDR Enabled
–0.75
0
512
1024
1536
2048
2560
3072
3584
4095
0
0.25
–0.50
–0.25
0.50
0.75
OUTPUT CODE
TPC 14. Integral Nonlinearity vs. Output Code
with SFDR Disabled
–0.5
0
512
1024
1536
2048
2560
3072
3584
4095
–0.4
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
0.4
0.5
OUTPUT CODE
TPC 15. Differential Nonlinearity vs. Output Code
ENCODE FREQUENCY – MHz
180
0
ICC (mA)
25
50
75
100
125
200
220
240
260
280
300
IDD (mA)
0
3
6
9
12
15
18
TPC 16. IDD and ICC vs. Encode Rate. fIN = 10.3 MHz,
Differential AIN @ –0.5 dBFS
–0.75
0
512
1024
1536
2048
2560
3072
3584
4095
0
0.25
–0.50
–0.25
0.50
0.75
OUTPUT CODE
TPC 17. Integral Nonlinearity vs. Output Code with
SFDR Enabled
FREQUENCY – MHz
–120
0
7.68
15.36
23.04
30.72
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
TPC 18. FFT: fS = 61.44 MSPS, fIN = 46.08 MHz, 4 WCDMA
Carriers, Differential AIN, SFDR Enabled



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