STM32F102XB datasheet(49/76 Pages) STMICROELECTRONICS

49 / 76 page

STM32F102x8, STM32F102xB

Electrical characteristics

Doc ID 15056 Rev 4

49/76

All I/Os are CMOS and TTL compliant (no software configuration required), their

characteristics are covering more than strict CMOS-technology or TTL parameters. The

coverage of these requirements is shown in Figure 20 and Figure 21 for standard I/Os and

in Figure 22 and Figure 23 for 5V tolerant I/Os.

Figure 20.

Standard I/O input characteristics - CMOS port

Vhys

Standard I/O Schmitt trigger

voltage hysteresis(2)

200

I/O FT Schmitt trigger voltage

hysteresis(2)

5% VDD

(3)

Ilkg

Input leakage current(4)

VSS ≤ VIN ≤ VDD

Standard I/Os

±1

µA

VIN = 5 V, I/O FT

RPU

Weak pull-up equivalent resistor(5)

VIN = VSS

RPD

Weak pull-down equivalent

resistor(5)

VIN = VDD

CIO

I/O pin capacitance

FT = Five-volt tolerant. In order to sustain a voltage higher than VDD+0.3 V, the internal pull-up/pull-down resistors must be

disabled.

Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested in production.

With a minimum of 100 mV.

Leakage could be higher than max. if negative current is injected on adjacent pins.

Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

PMOS/NMOS contribution to the series resistance is minimum (~10% order).

Table 34.

I/O static characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

ai17277b

VDD (V)

1.3

0.8

3.6

Input range

not guaranteed

1.59

2.7

VIH=0.41(VDD

-2)+1.3

0.7

CMOS

standard

requirement

VIH=0.65V

3.3

VIH/VIL (V)

CMOS standard

requirement

VIL=0.35VDD

ILmax

IHmin

-2)+0.8

=0.28(V

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