ADE7953 datasheet(18/68 Pages) AD

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ADE7953

Data Sheet

Rev. A | Page 18 of 68

ADE7953 POWER-UP PROCEDURE

The ADE7953 contains an on-chip power supply monitor that

supervises the power supply (VDD). While the voltage applied

to the VDD pin is below 2 V ± 10%, the chip is in an inactive

state. Once VDD crosses the 2 V ± 10% threshold, the power

supply monitor keeps the ADE7953 in an inactive state for an

additional 26 ms. This time delay allows VDD to reach the

minimum specified operating voltage of 3.3 V – 10%. Once

the minimum specified operating voltage is met, the internal

circuitry is enabled; this is accomplished in approximately

40 ms.

Once the start-up sequence is complete and the ADE7953 is

ready to receive communication from a microcontroller, the

reset flag is set in the IRQSTATA register (Address 0x22D and

Address 0x32D). An external interrupt is triggered on the IRQ

pin. The reset interrupt is enabled by default and cannot be

disabled, hence an external interrupt always occurs at the end

of a power-up procedure, hardware or software reset.

It is highly recommended that the reset interrupt is used by the

microcontroller to gate the first communication with the

ADE7953. If the interrupt is not used, a timeout can be

implemented; however, as the start-up sequence can vary part-

to-part and over temperature, a timeout of a least 100 ms is

recommended. The reset interrupt provides the most efficient

way of monitoring the completion of the ADE7953 start-up

sequence.

Once the start-up sequence is complete, communication with

the ADE7953 can begin. See the Communicating with the

ADE7953 section for further details.

REQUIRED REGISTER SETTING

For optimum performance, Register Address 0x120 must be

configured by the user after powering up the ADE7953. This

selected to maximize the accuracy and dynamic range. This

user each time the ADE7953 is powered up. Register 0x120 is

a protected register and thus a key must be written to allow the

followed:

•

Write 0xAD to Register Address 0xFE:

This unlocks

the register 0x120

•

Write 0x30 to Register Address 0x120: This configures the

optimum settings

The above two instructions must be performed in succession to

be successful.

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