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bq76PL536APAP 数据表(PDF) 45 Page - Texas Instruments |
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bq76PL536APAP 数据表(HTML) 45 Page - Texas Instruments |
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45 / 60 page ![]() bq76PL536A www.ti.com SLUSAD3A – JUNE 2011 – REVISED AUGUST 2012 [0] (CRC_DIS): This bit enables and disables the automatic generation of the CRC for the SPI communication packet. The packet size is determined by the host as part of the read request protocol. The CRC is checked at the deassertion of the CS pin. TI recommends that this bit be changed using the broadcast address (0x3f) so that all devices in a battery stack use the same protocol. 0 = A CRC is expected, and generated as the last byte of the packet. 1 = A CRC is not used in communications. CONFIG_COV REGISTER (0x42) 7 6 5 4 3 2 1 0 DISABLE – COV[5] COV[4] COV[3] COV[2] COV[1] COV[0] The CONFIG_COV register determines cell overvoltage threshold voltage. [7] (DISABLE): Disables the overvoltage function when set 0 = Overvoltage function enabled 1 = Overvoltage function disabled [5..0] (COV[5]…[0]): Configuration bits with corresponding voltage threshold 0x00 = 2 V; each binary increment adds 50 mV until 0x3c = 5 V. CONFIG_COVT REGISTER (0x43) 7 6 5 4 3 2 1 0 µs/ms – – COVD[4] COVD[3] COVD[2] COVD[1] COVD[0] The CONFIG_COVT register determines cell overvoltage detection delay time. [7] (µs/ms): Determines the units of the delay time, microseconds or milliseconds 0 = Microseconds 1 = Milliseconds [4..0] COVD: 0x01 = 100; each binary increment adds 100 until 0x1f = 3100 Note: When this register is programmed to 0x00, the delay becomes 0s AND the COV state is NOT latched in the COV_FAULT[] register. In this operating mode, the overvoltage state for a cell is virtually instantaneous in the COV_FAULT[] register. This mode may cause system firmware to miss a dangerous cell overvoltage condition. CONFIG_UV REGISTER (0x44) 7 6 5 4 3 2 1 0 DISABLE – – CUV[4] CUV[3] CUV[2] CUV[1] CUV[0] The CUV register determines cell under voltage threshold voltage. [7] (DISABLE): Disables the undervoltage function when set 0 = Undervoltage function enabled 1 = Undervoltage function disabled [5..0] (CUV[4]…[0]): Configuration bits with corresponding voltage threshold 0x00 = 0.7 V; each binary increment adds 100 mV until 0x1a = 3.3 V. Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 45 Product Folder Links :bq76PL536A |
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