bq76PL536APAP datasheet(22/60 Pages) TI

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bq76PL536A

SLUSAD3A – JUNE 2011 – REVISED AUGUST 2012

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Ratiometric Sensing

The OT protector circuits use ratiometric inputs to sense fault conditions. The REG50 output is applied internally

to the divider which forms the reference voltages used by the comparator circuit. It is also used externally as the

excitation source for the temperature sensor. This allows the REG50 output to vary over time or temperature

(within data-sheet limits) and have virtually no effect on the correct operation of the circuit. Any change seen by

the sensor is also seen by the divider, and therefore, changes proportionally. Although it is valid to represent the

trip setpoints as voltages if you assume that REG50 is at exactly 5 V, in practice, this is not the case. In the chart

included in the next section, the correct ratios [RB/(RB + RT + RTH)] are shown, along with the equivalent voltage

points when REG50 is assumed to be 5 V.

Table 1. Overtemperature Trip Setpoints

OT THRESHOLDS

CONFIG_OT

TNOM °C

VTS RATIO SET

VTS RATIO CLEAR

VSET

(1)

VCLEAR

(1)

Disabled

0.2000

0.1766

1.000

0.883

0.2244

0.2000

1.122

1.000

0.2488

0.2270

1.244

1.135

0.2712

0.2498

1.356

1.249

0.2956

0.2750

1.478

1.375

0.3156

0.2956

1.578

1.478

0.3356

0.3162

1.678

1.581

0.3556

0.3368

1.778

1.684

0.3712

0.3528

1.856

1.764

0.3866

0.3688

1.933

1.844

0.4000

0.3824

2.000

1.912

(1)

Assumes REG50 = 5.000 V

Thermistor Power

To minimize power consumption, the thermistors are not powered ON by default. Two bits are provided in

IO_CONTROL[] to control powering the thermistors, TS1 and TS2. The TSn– input is only connected to VSS

when the corresponding bit is set. The user firmware must set these bits to 1 to enable both temperature

measurement and the secondary protector functions. When the thermistor functions are not in use, the bits may

be programmed to 0 to remove current through the thermistor circuits.

Thermistor Input Conditioning

A filter capacitor is recommended to minimize noise in to the ADC and protector. The designer should insure that

the filter capacitor has sufficient time to charge before reading the thermistors. The CONFIG_OTT[] value should

also be set to >5t, the time delay introduced by the RC network comprising CF, RTH, RT, and RB, to avoid false

triggering of the PROTECTOR function and ALERT signal when the TS1 and/or TS2 bits are set to 1 and the

inputs enabled.

On exit from the SLEEP state, the OT fault comparators are disabled for approximately 200 µs to allow internal

circuitry to stabilize and prevent false error-condition detection.

Fault and Alert Behavior

When the FAULT_N pin is asserted by the next higher bq76PL536A in the stack, then the FAULT_S is also

asserted, thereby passing the signal down the array of stacked devices if they are present. FAULT_N should

always be connected to the FAULT_S of the next higher device in the stack. If no higher device exists, it should

be tied to VBAT of this bq76PL536A, either directly or via a pullup resistor ~10 kΩ to 1 MΩ. The FAULT_x pins are

active-high – current flows when asserted. The ALERT_x pins behave in a similar manner. If the FAULT_N pin of

the base device (HSEL = 0) becomes asserted, it asserts its FAULT_H signal to the host microcontroller. This

signal chain may be used to create an interrupt to the CPU, or drive other compatible logic or I/O directly.

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