AD9857

Rev. C| Page 7 of 40

Parameter

Temp

Test Level

Min

Typ

Max

Unit

Full Operating Conditions

25°C

I

540

615

mA

160 MHz Clock (×16)

25°C

I

445

515

mA

120 MHz Clock (×12)

25°C

I

345

400

mA

Burst Operation (25%)

25°C

I

395

450

mA

Single-Tone Mode

25°C

I

265

310

mA

Power-Down Mode

25°C

I

71

80

mA

Full-Sleep Mode

25°C

I

8

13.5

mA

time assumes that there is no capacitor on DAC_BP, and that the recommended PLL loop filter values are used. The state of the reference clock multiplier lock can be

determined by observing the signal on the PLL_LOCK pin.

SYSCLK frequency is the external frequency multiplied by the reference clock multiplier multiplication factor. If the reference clock multiplier is not used, the SYSCLK

frequency is the same as the external REFCLK frequency.