AD9857

Rev. C| Page 9 of 40

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

80 79 78 77 76

71 70 69 68

75 74 73 72

21 22 23 24 25 26 27 28 29 30 31 32 33

1

2

3

4

5

6

7

8

9

10

11

13

12

60

59

58

57

56

55

54

53

52

51

50

49

48

NC = NO CONNECT

AD9857

TOP VIEW

(Not to Scale)

D13

D12

D11

D10

D9

D8

D7

DVDD

DVDD

DVDD

DGND

DGND

DGND

DIFFCLKEN

AGND

AVDD

NC

AGND

PLL_FILTER

AVDD

AGND

NC

NC

DAC_RSET

DAC_BP

AVDD

PIN 1

INDICATOR

14

15

16

17

18

20

19

47

46

45

44

43

42

41

D6

D5

D4

D3

D2

D1

D0

AGND

IOUT

IOUT

AGND

AVDD

AGND

NC

64 63 62 61

67 66 65

34 35 36 37 38 39 40

Figure 2. Pin Configuration

Table 4. Pin Function Descriptions

Pin Number

Mnemonic

I/O

Function

20–14, 7–1

D0–D6, D7–

D13

I

14-Bit Parallel Data Bus for I and Q Data. The required numeric format is twos complement with D13

as the sign bit and D12–D0 as the magnitude bits. Alternating 14-bit words are demultiplexed onto

the I and Q data pathways (except when operating in the interpolating DAC mode, in which case

every word is routed onto the I data path). When the TxENABLE pin is asserted high, the next

accepted word is presumed to be I data, the next Q data, and so forth.

8–10, 31–33,

73–75

DVDD

3.3 V Digital Power pin(s).

11–13, 28–30,

70–72, 76–78

DGND

Digital Ground pin(s).

21

PS1

I

Profile Select Pin 1. The LSB of the two profile select pins. In conjunction with PS0, selects one of four

profile configurations.

22

PS0

I

Profile Select Pin 0. The MSB of the two profile select pins. In conjunction with P1, selects one of four

profile configurations.

23

CS

I

Serial Port Chip Select pin. An active low signal that allows multiple devices to operate on a single

serial bus.

24

SCLK

I

Serial Port Data Clock pin. The serial data CLOCK for the serial port.

25

SDIO

I/O

Serial Port Input/Output Data pin. Bidirectional serial DATA pin for the serial port. This pin can be

programmed to operate as a serial input only pin, via the control register bit 00h<7>. The default

state is bidirectional.

26

SDO

O

Serial Port Output Data pin. This pin serves as the serial data output pin when the SDIO pin is

configured for serial input only mode. The default state is three-state.

27

SYNCIO

I

Serial Port Synchronization pin. Synchronizes the serial port without affecting the programmable

register contents. This is an active high input that aborts the current serial communication cycle.

34, 41, 51, 52,

57

NC

No connect.