OMAP3530ECUS datasheet(256/264 Pages) TI1

256 / 264 page

PREFIX

OMAP3530

X = Experimental Device

P = Prototype Device

blank= Production Device

DEVICE

PACKAGE TYPE

CBB = 515 pin s-PBGA

CBC = 515 pin s-PBGA

CUS = 423 pin s-PBGA

SILICON REVISION

CBB

( )

blank = 0° C to 90° C (commercial temperature)

= -40° C to 105° C (extended temperature)

blank = 600 MHz Cortex - A8

= 720 MHz Cortex - A8

( )

blank = Tray

= Tape and Reel

7.2.2

Documentation Support

7.2.2.1 Related Documentation from Texas Instruments

OMAP3530/25 Applications Processor

SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009

www.ti.com

Predictions show that prototype devices (X or P), have a greater failure rate than the standard production

devices. Texas Instruments recommends that these devices not be used in any production system

because their expected end-use failure rate still is undefined. Only qualified production devices are to be

used.

For additional description of the device nomenclature markings, see the OMAP35x Applications Processor

Silicon Errata (literature number SPRZ278).

For more information on the silicon revision, please see the OMAP3530/25/15/03 Applications Processor Silicon

Errata (literature number SPRZ278).

Figure 7-1. Device Nomenclature(A)

The following documents describe the OMAP3530/25 Applications Processor. Copies of these documents

are available on the Internet at www.ti.com. Tip: Enter the literature number in the search box provided at

www.ti.com.

The current documentation that describes the OMAP3530/25 Applications Processor, related peripherals,

and other technical collateral, is available in the product folder at: www.ti.com.

SPRUF98

OMAP35x Technical Reference Manual. Collection of documents providing detailed

information on the OMAP3 architecture including power, reset, and clock control, interrupts,

memory map, and switch fabric interconnect. Detailed information on the microprocessor unit

(MPU) subsystem, the image, video, and audio (IVA2.2) subsystem, as well a functional

description of the peripherals supported on OMAP35x devices is also included.

SPRU732

TMS320C64x/C64x+ DSP CPU and Instruction Set Reference Guide.Describes the CPU

architecture, pipeline, instruction set, and interrupts for the TMS320C64x and TMS320C64x+

digital signal processors (DSPs) of the TMS320C6000 DSP family. The C64x/C64x+ DSP

generation comprises fixed-point devices in the C6000 DSP platform. The C64x+ DSP is an

enhancement of the C64x DSP with added functionality and an expanded instruction set.

SPRU871

TMS320C64x+ DSP Megamodule Reference Guide.Describes the TMS320C64x+ digital

signal processor (DSP) megamodule. Included is a discussion on the internal direct memory

access (IDMA) controller, the interrupt controller, the power-down controller, memory

protection, bandwidth management, and the memory and cache.

SPRU889

High-Speed DSP Systems Design Reference Guide. Provides recommendations for

meeting the many challenges of high-speed DSP system design. These recommendations

include information about DSP audio, video, and communications systems for the C5000 and

C6000 DSP platforms.

256

PACKAGE CHARACTERISTICS

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