 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
OMAP3530ECUS 数据表(PDF) 126 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
OMAP3530ECUS 数据表(HTML) 126 Page - Texas Instruments |
|
|
126 / 264 page  OMAP3530/25 Applications Processor SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009 www.ti.com Table 3-4. DC Electrical Characteristics (continued) PARAMETER MIN NOM MAX UNIT VOL Thevenin output low level –50 50 mV VOH Thevenin output high level 1.1 1.2 1.3 V Low-Power Receiver (LP-RX) VIL Low-level input threshold 550 mV VIH High-level input threshold 880 mV VHYST Input hysteresis 25 mV Ultralow-Power Receiver (ULP-RX) VIL-ULPS Low-level input threshold, ULPM 300 mV VIH High-level input threshold 880 mV subLVDS/CMOS Pin Buffers - CBB: AA27, AA28, AB27, AB28, AD27, AD28, AC28, AC27/ CBC: AC26, AD26, AA25, Y25, AA26, AB26, AC25, AB25/ CUS: V22, W22, Y22, AB22, AC23, AC22, W21, V21 Vod Differential voltage range @ RL = 100 Ω 100 150 200 mV Vocm Common mode voltage range 0.8 0.9 1 V tT Input transition time (Vod rise time, tR or Vod fall time, tF 200 500 ps evaluated between 20% and 80% at PAD) Standard LVCMOS Pin Buffers VIH (4) High-level input voltage (Standard LVCMOS) 0.65 × vdds vdds + 0.3 V VIL (4) Low-level input voltage (Standard LVCMOS) - 0.3 0.35 × vdds V VHYS Hysteresis voltage at an input(5) 0.1 V VOH High-level output voltage, driver enabled, IO = IOH or vdds – 0.45 V pullup or pulldown disabled IO = –2 mA IO = IOH < |–2| vdds – 0.40 mA VOL Low-level output voltage with , driver enabled, IO = IOL or 0.45 V pullup or pulldown disabled IO = 2 mA IO = IOL < 2 mA 0.40 tT Input transition time (rise time, tR or fall time, tF evaluated 0 10(1) ns between 10% and 90% at PAD) II Input current with VI = VI max –1 1 µA IOZ Off-state output current for output in high impedance with driver –20 20 µA only, driver disabled Off-state output current for output in high impedance with –100 driver/receiver/pullup only, driver disabled, pullup not inhibited Off-state output current for output in high impedance with 100 driver/receiver/pulldown only, driver disabled, pulldown not inhibited IZ Total leakage current through the PAD connection of a – 20 20 µA driver/receiver combination that may include a pullup or pulldown. The driver output is disabled and the pullup or pulldown is inhibited. LVCMOS Open-Drain Pin Buffers Dedicated to I2C IOs - CBB: K21, J21, AF14, AG14, AF15, AE15, AD26, AE26/ CBC: J25, J24, C2, C1, AB4, AC4, AD15, W16, A21, C21/ CUS: K20, K21, AC13, AC12, AC15, AC14, Y16, Y15 VIH High level input voltage 0.7 x vdds vdds + 0.5 V VIL Low level input voltage - 0.5 0.3 x vdds V VOL Low-level output voltage open-drain at 3-mA sink current 0 0.2 x vdds V II Input current at each I/O pin with an input voltage between 0.1 x - 10 10 µA vdds to 0.9 x vdds CI Capacitance for each I/O pin 10 pF (4) VIH/VIL (Standard LVCMOS) parameters are applicable for sys_altclk input clocks. (5) Vhys is the magnitude of the difference between the positive-going threshold voltage VT+ and the negative-going voltage VT-. ELECTRICAL CHARACTERISTICS 126 Submit Documentation Feedback |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
