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STM8AF6166 数据表(PDF) 73 Page - STMicroelectronics |
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STM8AF6166 数据表(HTML) 73 Page - STMicroelectronics |
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73 / 89 page ![]() STM8AF61xx, STM8AF62xx Electrical characteristics Doc ID 14952 Rev 6 73/89 Static latch-up Two complementary static tests are required on 10 parts to assess the latch-up performance. ● A supply overvoltage (applied to each power supply pin) and ● A current injection (applied to each input, output and configurable I/O pin) are performed on each sample. This test conforms to the EIA/JESD 78 IC latch-up standard. For more details, refer to the application note AN1181. 10.4 Thermal characteristics In case the maximum chip junction temperature (TJmax) specified in Table 23: General operating conditions on page 49 is exceeded, the functionality of the device cannot be guaranteed. TJmax, in degrees Celsius, may be calculated using the following equation: TJmax = TAmax + (PDmax x ΘJA) Where: –TAmax is the maximum ambient temperature in ° C – ΘJA is the package junction-to-ambient thermal resistance in ° C/W –PDmax is the sum of PINTmax and PI/Omax (PDmax = PINTmax + PI/Omax) –PINTmax is the product of IDD and VDD, expressed in Watts. This is the maximum chip internal power. –PI/Omax represents the maximum power dissipation on output pins Where: PI/Omax = Σ (VOL*IOL) + Σ((VDD-VOH)*IOH), taking into account the actual VOL/IOL and VOH/IOH of the I/Os at low and high level in the application. Table 47. Electrical sensitivities Symbol Parameter Conditions Class(1) 1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC specifications, that means when a device belongs to class A it exceeds the JEDEC standard. B class strictly covers all the JEDEC criteria (international standard). LU Static latch-up class TA = 25 °C A TA = 85 °C TA = 125 °C TA = 150 °C (2) 2. Available on STM8AF62xx devices only. |
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