| 数据搜索系统,热门电子元器件搜索 |
|
STM8AF6166 数据表(PDF) 86 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM8AF6166 数据表(HTML) 86 Page - STMicroelectronics |
|
86 / 89 page ![]() Revision history STM8AF61xx, STM8AF62xx 86/89 Doc ID 14952 Rev 6 31-Jan-2011 5 Modified references to reference manual, and Flash programming manual in the whole document. Added reference to AEC Q100 standard on cover page. Renamed timer types as follows: – Auto-reload timer to general purpose timer – Multipurpose timer to advanced control timer – System timer to basic timer Introduced concept of medium density Flash program memory. Updated timer names in Figure 1: STM8A block diagram. Added TMU brief description in Section 5.4: Flash program and data EEPROM, and updated TMU_MAXATT description in Table 18: Option byte description. Updated clock sources in clock controller features (Section 5.5.1). Changed 16MHZTRIM0 to HSITRIM bit in Section : User trimming. Added Table 4: Peripheral clock gating bits in Section 5.5.6. Updated Section 5.6: Low-power operating modes. Added calibration using TIM3 in Section 5.7.2: Auto-wakeup counter. Added Table 7: ADC naming and Table 8: Communication peripheral naming correspondence. Added Note 1 related AIN12 pin in Section 5.8: Analog-to-digital converter (ADC)and Table 10: STM8AF61xx/62xx (32 Kbytes) microcontroller pin description. Updated SPI data rate to 10 Mbit/s or fMASTER/2 in Section 5.9.1: Serial peripheral interface (SPI). Added reset state in Table 9: Legend/abbreviation. Table 10: STM8AF61xx/62xx (32 Kbytes) microcontroller pin description: added Note 7 related to PD1/SWIM, modified Note 6, corrected wpu input for PE1 and PE2, and renamed TIMn_CCx and TIMn_NCCx to TIMn_CHx and TIMn_CHxN, respectively. Section 7.2: Register map: Replaced tables describing register maps and reset values for non- volatile memory, global configuration, reset status, clock controller, interrupt controller, timers, communication interfaces, and ADC, by Table 13: General hardware register map. Added Note 1 for Px_IDR registers in Table 12: I/O port hardware register map. Updated register reset values for Px_IDR registers. Added SWIM and debug module register map. Table 52. Document revision history (continued) Date Revision Changes |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |