C2.5X6.3MM-RAD datasheet(28/38 Pages) SILABS

28 / 38 page

Si3226/7

Si3208/9

Preliminary Rev. 0.33

4.17. SPI Control Interface

The controller interface to the Dual ProSLIC is a 4-wire

interface modeled after microcontroller and serial

peripheral devices. The interface consists of a clock

(SCLK), chip select (CS), serial data input (SDI), and

serial data output (SDO). In addition, the Dual ProSLIC

devices feature a serial data through output (SDITHRU)

to support operation of up to eight devices (up to 16

channels) using a single chip select line. The device

operates with both 8-bit and 16-bit SPI controllers.

4.18. PCM Interface and Companding

The Dual ProSLIC contains a flexible, programmable

interface for the transmission and reception of digital

PCM samples. PCM data transfer is controlled by the

PCM clock (PCLK) and frame sync (FSYNC) inputs as

well as the PCM Mode Select, PCM Transmit Start, and

PCM Receive Start settings.

The interface can be configured to support from four to

128

8-bit

time

slots

each

125 µs

frame,

corresponding to a PCM clock (PCLK) frequency range

of 256 kHz to 8.192 MHz. 1.544 MHz is also supported.

The Dual ProSLIC supports both µ-255 Law (µ-Law)

and A-law companding formats in addition to 16-bit

linear data mode with no companding.

4.19. General Circuit Interface

The

Dual

ProSLIC

supports

alternative

communication interface to the SPI and PCM control

and data interface. The General Circuit Interface (GCI)

is used for transmission and reception of both control

and data information onto a GCI bus. The PCM and GCI

interfaces are both 4-wire interfaces and share the

same pins. In GCI mode, the four-wire SPI control

interface is used as hard-wired channel selector pins.

The selection between PCM and GCI modes is

performed when coming out of reset using the

SDITHRU pin.

4.20. Metallic Loop Testing

The Dual ProSLIC includes the ability to detect multiple

fault conditions within the line card as well as on the T/R

pair.

1. Hazardous Potential Test—This test checks for ac

voltage >50 Vrms or dc voltage >135 V on T-G or R-

G. If a hazardous voltage is encountered, test access

MUST release within two seconds of the time when it

was initiated using a preset threshold.

2. Foreign ElectroMotive Force Test—Checks T-G or

R-G for ac voltage >10 Vrms, dc voltage >6 V. Uses

same threshold as for hazardous voltage test.

3. Resistive Faults Test—Checks for dc resistance from

T-R, T-G or R-G. Any measurement <150 k

Ω is

considered a resistive fault.

4. Receiver-Off-Hook Test—Distinguishes between a

T-R resistive fault and an off-hook condition.

5. Ringers Test—Checks for the presence of REN

across T-R. Result are >0.175REN and <5REN for a

valid load.

6. AC Line Impedance (line length)—T-R, T-G, and

R-G. Generate a tone at several specific frequencies

(audio band) and measure the reflected signal

amplitude (complex spectrum) that comes back (with

transhybrid balance filter disabled). The reflected

signal is then used to calculate the line impedance

based on certain assumptions of wire gauge, etc.

7. Line Capacitance—T-R, T-G, R-G. Generate a linear

ramp function with polarity reversal, and measure

the time constant.

8. Ringer Capacitance—This test uses the same

procedure as the ringer test above but also

measures the V/I phase relationship of the received

signal (dc path) and then subtracts the delay to

calculate the ringer capacitance.

9. Ringing Voltage Verification—Uses current voltage

sensing capability.

10.Test-In Diagnostics—The Dual ProSLIC can switch

in a preset load impedance to test the SLIC/codec

functionality using a known set of conditions.

C2.5X6.3MM-RAD 数据表(PDF) 28 Page - Silicon Laboratories

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