AM79C30AVC datasheet(63/101 Pages) AMD

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Am79C30A/32A Data Sheet

C/I Transmit Data Register 0 (C/ITDR0) Default = 0F Hex

Address = Indirect C4 Hex, Write

The C/I Transmit Data Register 0 is the user-visible portion of the C/I channel 0 transmitter. Data can be written into

this register by the user at any time and is transmitted continuously during each subsequent frame until changed.The

register is set to its default value, 0F hex (C/I channel idle), by reset or disabling of the Peripheral Port. Bus access

request bit-When set, the DSC will attempt to gain access to the C/I0 channel if TIC bus is enabled.

C/I Receive Data Register 0 (C/IRDR0) Default = XF Hex

Address = Indirect C4 Hex, Read

The C/I Receive Data Register 0 contains data valid for two frames from C/I Receive channel 0. The register is set

to its default value of XF hex by a reset or the disabling of the Peripheral Port.

C/I Transmit Data Register 1 (C/ITDR1) Default = 3F Hex

Address = Indirect C5 Hex, Write

The C/I Transmit Data Register 1 is the user-visible portion of the C/I channel 1 transmitter. Data can be written into

this register by the user at any time. It is transmitted continuously during each subsequent frame until changed. The

C/I Receive Data Register 1 (C/IRDR1)

Default = Bits 7 and 6 are Indeterminate, Bits 5–0 = 1

Address = Indirect C5 Hex, Read

The C/I Receive Data Register 1 contains the data (valid for two frames) from C/I Receive channel 1. The register

is set to its default value by a reset or the disabling of the Peripheral Port.

654

Bus Access

Request

RSRVD

C/I0

DATA

BIT 3

(MSB)

C/I0

DATA

BIT 2

C/I0

DATA

BIT 1

C/I0

DATA

BIT 0

(LSB)

654

RSRVD

C/I0

DATA

BIT 3

(MSB)

C/I0

DATA

BIT 2

C/I0

DATA

BIT 1

C/I0

DATA

BIT0

(LSB)

654

RSRVD

C/I1

DATA

BIT 5

(MSB)

C/I1

DATA

BIT 4

C/I1

DATA

BIT 3

C/I1

DATA

BIT 2

C/I1

DATA

BIT 1

C/I1

DATA

BIT 0

(LSB)

654

RSRVD

C/I1

DATA

BIT 5

(MSB)

C/I

DATA

BIT 4

C/I1

DATA

BIT 3

C/I1

DATA

BIT 2

C/I1

DATA

BIT 1

C/I1

DATA

BIT 0

(LSB)

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