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STM32F207IE 数据表(PDF) 23 Page - STMicroelectronics |
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STM32F207IE 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 163 page ![]() STM32F205xx, STM32F207xx Description Doc ID 15818 Rev 7 23/163 Figure 7. Startup in regulator OFF: fast VDD slope - power-down reset risen before VCAP_1/VCAP_2 stabilization 2.2.18 Real-time clock (RTC), backup SRAM and backup registers The backup domain of the STM32F205xx and STM32F207xx includes: ● The real-time clock (RTC) ● 4 Kbytes of backup SRAM ● 20 backup registers The real-time clock (RTC) is an independent BCD timer/counter. Dedicated registers contain the second, minute, hour (in 12/24 hour), week day, date, month, year, in BCD (binary-coded decimal) format. Correction for 28, 29 (leap year), 30, and 31 day of the month are performed automatically. The RTC provides a programmable alarm and programmable periodic interrupts with wakeup from Stop and Standby modes. It is clocked by a 32.768 kHz external crystal, resonator or oscillator, the internal low-power RC oscillator or the high-speed external clock divided by 128. The internal low-speed RC has a typical frequency of 32 kHz. The RTC can be calibrated using an external 512 Hz output to compensate for any natural quartz deviation. Two alarm registers are used to generate an alarm at a specific time and calendar fields can be independently masked for alarm comparison. To generate a periodic interrupt, a 16-bit programmable binary auto-reload downcounter with programmable resolution is available and allows automatic wakeup and periodic alarms from every 120 µs to every 36 hours. A 20-bit prescaler is used for the time base clock. It is by default configured to generate a time base of 1 second from a clock at 32.768 kHz. The backup SRAM size is 4 Kbytes and can be enabled by software. When the backup RAM is enabled the power consumption in Standby or VBAT mode is slightly higher (see Section 2.2.19: Low-power modes). The backup registers are 32-bit registers used to store 80 bytes of user application data when VDD power is not present. Backup registers are not reset by a system, a power reset, or when the device wakes up from the Standby mode (see Section 2.2.19: Low-power modes). The RTC, backup RAM and backup registers are supplied through a switch that takes power from either the VDD supply when present or the VBAT pin. |
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