5CSXFC6D datasheet(9/35 Pages) ALTERA

9 / 35 page

Figure 3: Sample Ordering Code and Available Options for Cyclone V GT Devices

Family Signature

Embedded Hard IPs

Transceiver Count

Transceiver

Speed Grade

Package Type

Package Code

Operating Temperature

FPGA Fabric

Speed Grade

GT : 6-Gbps transceivers

F : Maximum 2 hard PCIe and

2 hard memory controllers

5C : Cyclone V

D5 : 77K logic elements

D7 : 149.5K logic elements

D9 : 301K logic elements

B : 3

F : 4

A : 5

C : 6

D : 9

E : 12

5 : 6.144 Gbps

F : FineLine BGA (FBGA)

U : Ultra FineLine BGA (UBGA)

M : Micro FineLine BGA (MBGA)

FBGA Package Type

23 : 484 pins

27 : 672 pins

31 : 896 pins

35 : 1,152 pins

UBGA Package Type

19 : 484 pins

MBGA Package Type

11 : 301 pins

13 : 383 pins

15 : 484 pins

C : Commercial (TJ = 0° C to 85° C)

: Industrial (TJ = -40° C to 100° C)

A : Automotive (TJ = -40° C to 125° C)

6 (fastest)

Member Code

Family Variant

Optional Suffix

Indicates specific device

options or shipment method

N : Lead-free packaging

Contact Altera for availability

of leaded options

ES : Engineering sample

Maximum Resources

Table 8: Maximum Resource Counts for Cyclone V GT Devices

Member Code

Resource

301

149.5

Logic Elements (LE) (K)

113,560

56,480

29,080

ALM

454,240

225,920

116,320

12,200

6,860

4,460

M10K

Memory (Kb)

1,717

836

424

MLAB

342

156

150

Variable-precision DSP Block

684

312

300

18 x 18 Multiplier

PLL

6 Gbps Transceiver

560

480

336

GPIO

(3)

140

120

Transmitter

LVDS

140

120

Receiver

PCIe Hard IP Block

(3) The number of GPIOs does not include transceiver I/Os. In the Quartus II software, the number of user I/Os

includes transceiver I/Os.

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Cyclone V Device Overview

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Maximum Resources

CV-51001

2013.12.26

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