Member Code

Resource

D9

D7

D5

2

2

2

Hard Memory Controller

Related Information

I/O Features in Cyclone V Devices

Provides the number of LVDS channels in each device package.

Package Plan

Table 9: Package Plan for Cyclone V GT Devices

F1152

(35 mm)

F896

(31 mm)

F672

(27 mm)

F484

(23 mm)

U484

(19 mm)

M484

(15 mm)

M383

(13 mm)

M301

(11 mm)

Member

Code

XCVR

GPIO

XCVR

GPIO

XCVR

GPIO

XCVR

GPIO

XCVR

GPIO

XCVR

GPIO

XCVR

GPIO

XCVR

GPIO

—

—

—

—

6

336

6

240

6

224

—

—

6

175

4

129

D5

—

—

9

(4)

480

9

(4)

336

6

240

6

240

3

240

—

—

—

—

D7

12

(5)

560

12

(5)

480

9

(4)

336

6

224

5

240

—

—

—

—

—

—

D9

Cyclone V SE

This section provides the available options, maximum resource counts, and package plan for the Cyclone V SE

devices.

The information in this section is correct at the time of publication. For the latest information and to get

more details, refer to the Altera Product Selector.

Related Information

Altera Product Selector

Provides the latest information about Altera products.

Available Options

The following figure shows sample ordering code and lists the options available for Cyclone V SE devices.

use only up to three full-duplex transceiver channels for CPRI, and up to six full-duplex channels for PCIe

Gen2. The CMU channels are not considered full-duplex channels.

use only up to three full-duplex transceiver channels for CPRI, and up to eight full-duplex channels for PCIe

Gen2. The CMU channels are not considered full-duplex channels.

Cyclone V Device Overview

Altera Corporation

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CV-51001

Package Plan

10

2013.12.26