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CS4360 数据表(PDF) 30 Page - Cirrus Logic |
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CS4360 数据表(HTML) 30 Page - Cirrus Logic |
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30 / 36 page ![]() CS4360 30 DS517PP1 LRCK SCLK Left Channel Right Channel SDINx 65 4 3210 987 15 14 13 12 11 10 10 65 43210 987 15 14 13 12 11 10 17 16 17 16 32 clocks 19 18 19 18 Figure 21. CS4360 Format 4 - Right Justified 20-bit Data LRCK SCLK Left Channel Right Channel SDINx 6 54321 0 98 7 15 14 13 12 11 10 10 65 4 3 2 1 0 98 7 15 14 13 12 11 10 17 16 17 16 32 clocks Figure 22. CS4360 Format 5 - Right Justified 18-bit Data Gain dB -10dB 0dB Frequency T2 = 15 µs T1=50 µs F1 F2 3.183 kHz 10.61 kHz Figure 23. De-Emphasis Curve |
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