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AN4635 数据表(PDF) 12 Page - STMicroelectronics |
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AN4635 数据表(HTML) 12 Page - STMicroelectronics |
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12 / 34 page ![]() Other considerations AN4635 12/34 DocID027290 Rev 1 Additionally, in blocking mode, which requires the least CPU processing resources, it is possible to take advantage of the low power run mode. This mode essentially bypasses the main voltage regulator and powers the core with power consumption approximately another 25% lower than the range 3 of the main power regulator can achieve (Section 6.2). But waking from Stop or Sleep mode brings the main regulator back on and considering the current low clock speed (MSI range 1 at most) the core must immediately dedicate all processing power to data reception. In practical terms the LPRUN is great for transmission phase, but when waiting for data reception it is usually better to take advantage of the Stop mode instead of keeping the CPU in LPRUN. It is however possible to put the main voltage regulator temporarily to range 3 (it must be in range 2 when switch to LPRUN is done). Changing configuration of main regulator is quicker than switching the regulator and less likely to cause dropped bytes in incoming message. |
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